Electrothermal simulation of self-heating in DMOS transistors up to thermal runaway

M Pfost, C Boianceanu, H Lohmeyer… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
Power double-diffusion metal-oxide-semiconductor (DMOS) transistors are often subject to
significant self-heating and, thus, high device temperatures. This limits their safe operating …

Advanced methodology for fast 3-D TCAD device/circuit electrothermal simulation and analysis of power HEMTs

A Chvála, D Donoval, A Šatka, M Molnár… - … on Electron Devices, 2015 - ieeexplore.ieee.org
This paper introduces an advanced methodology for fast 3-D Technology Computer Aided
Design (TCAD) electrothermal simulation for the analysis of power devices. The proposed …

Fast 3-D electrothermal device/circuit simulation of power superjunction MOSFET based on SDevice and HSPICE interaction

A Chvála, D Donoval, J Marek… - … on Electron Devices, 2014 - ieeexplore.ieee.org
Automated interaction of SDevice and HSPICE for fast 3-D electrothermal simulation based
on the relaxation method is designed. The results are compared with device finite element …

3D-IC dynamic thermal analysis with hierarchical and configurable chip thermal model

SH Pan, N Chang, T Hitomi - 2013 IEEE International 3D …, 2013 - ieeexplore.ieee.org
The thermal response in 3D-IC is important for its impact on chip sign-off for thermal sensor
placement, Tmax control, and thermal-aware electro-migration (EM). Thermal responses in …

The impact of electro-thermal coupling on HBT power amplifiers

MT Ozalas - 2014 IEEE Compound Semiconductor Integrated …, 2014 - ieeexplore.ieee.org
Thermal issues pose significant challenges for today's RF power amplifier designs.
Recently, layout-based electro-thermal simulation tools have become widely available …

Electro-thermal high-level modeling of integrated circuits

JC Krencker, JB Kammerer, Y Hervé, L Hébrard - Microelectronics Journal, 2014 - Elsevier
Operating temperature and temperature gradients are of critical concern in the design of
planar integrated circuits (ICs) and are bound to be exacerbated in the upcoming 3D …

An efficient transient electro-thermal simulation framework for power integrated circuits

Q Mei, W Schoenmaker, SH Weng… - … on Computer-Aided …, 2015 - ieeexplore.ieee.org
This paper presents a new transient electro-thermal simulation method for fast 3-D chip-level
analysis of power electronics with field solver accuracy. The metallization stack and …

Fine grain thermal modeling and experimental validation of 3D-ICs

H Oprins, A Srinivasan, M Cupak, V Cherman… - Microelectronics …, 2011 - Elsevier
3D die stacking is a promising technique to allow miniaturization and performance
enhancement of electronic systems. Key technologies for realizing 3D interconnect schemes …

A new tightly-coupled transient electro-thermal simulation method for power electronics

Q Chen, W Schoenmaker - 2016 IEEE/ACM International …, 2016 - ieeexplore.ieee.org
This paper presents a new transient electro-thermal (ET) simulation method for fast 3D chip-
level analysis of power electronics with field solver accuracy. The metallization stacks are …

Fine grain thermal modeling of 3D stacked structures

H Oprins, M Cupak, G Van Der Plas… - … Investigations of ICs …, 2009 - ieeexplore.ieee.org
3D stacking of dies is a promising technique to allow miniaturization and performance
enhancement of electronic systems. Key technologies for realizing 3D interconnect schemes …