High-performance and energy-efficient CNFET-based designs for ternary logic circuits

RA Jaber, A Kassem, AM El-Hajj, LA El-Nimri… - IEEE …, 2019 - ieeexplore.ieee.org
Recently, the demand for portable electronics and embedded systems has increased. These
devices need low-power circuit designs because they depend on batteries as an energy …

CNFET-based designs of Ternary Half-Adder using a novel “decoder-less” ternary multiplexer based on unary operators

RA Jaber, AM El-Hajj, A Kassem, LA Nimri… - Microelectronics …, 2020 - Elsevier
Multi-valued logic (MVL) has more than two-valued logic to decrease the interconnections
and energy consumption. Also, the market has seen a significant increase in portable …

A novel low-energy CNTFET-based ternary half-adder design using unary operators

RA Jaber, B Owaidat, A Kassem… - … on innovation and …, 2020 - ieeexplore.ieee.org
Energy consumption is a critical factor to be reduced when designing embedded systems
and IoT devices. By using Multiple-valued logic (MVL) circuits, interconnections complexity …

CNTFET-based design of ternary multiplier using only multiplexers

RA Jaber, AM Haidar, A Kassem - 2020 32nd International …, 2020 - ieeexplore.ieee.org
Multiple-valued logic (MVL) circuit has many-valued logic in each digit to lower
interconnections and energy consumption over a binary logic circuit. Therefore, this paper …

A novel binary to ternary converter using double pass-transistor logic

RA Jaber, AM El-Hajj, AM Haidar… - 2019 31st …, 2019 - ieeexplore.ieee.org
The ternary circuit has an advantage over the binary circuit concerning interconnect
complexity, propagation delay, and energy consumption. This paper proposes a novel …

[HTML][HTML] Ternary logic decoder using independently controlled double-gate Si-NW MOSFETs

SJ Han, JK Han, MS Kim, GJ Yun, JM Yu, IW Tcho… - Scientific reports, 2021 - nature.com
A ternary logic decoder (TLD) is demonstrated with independently controlled double-gate
(ICDG) silicon-nanowire (Si-NW) MOSFETs to confirm a feasibility of mixed radix system …

[HTML][HTML] Lattice Structure of Some Closed Classes for Three-Valued Logic and Its Applications

EY Kalimulina - Mathematics, 2021 - mdpi.com
This paper provides a brief overview of modern applications of nonbinary logic models,
where the design of heterogeneous computing systems with small computing units based on …

Design of CNTFET-based Ternary Logic circuits using Low power Encoder

T Siddharth, S Gadgil… - 2022 IEEE International …, 2022 - ieeexplore.ieee.org
Ternary logic has received considerable attention in the past decade for its advantages of
reduced chip area and reduced chip interconnect compared to traditional binary logic …

A novel CNFET-based ternary to binary converter design in data transmission

RA Jaber, AM El-Hajj, AM Haidar… - 2020 32nd International …, 2020 - ieeexplore.ieee.org
The limitations in binary data transmission are mainly for low speed and a notable increase
in energy consumption. Whereas, Multiple-Valued Logic (MVL) has over two-valued logic to …

Design of Encoder based Half-Adder using GNRFET Technology in Ternary Logic

T Kishore, P Venkatramana - 2023 International Conference on …, 2023 - ieeexplore.ieee.org
The ternary logic technology is best alternative over the traditional binary logic. Because of it
provides the simple and power efficiency in the circuits. The ternary logic circuits using …