An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications

M Rafiee, F Pesaran, A Sadeghi, N Shiri - Microelectronics Journal, 2021 - Elsevier
Different digital multipliers have resulted from various algorithms and hardware designs.
This article presents a high-performance multiplier by a novel AND gate and a modified …

Design and Implementation of ALU Using Graphene Nanoribbon Field‐Effect Transistor and Fin Field‐Effect Transistor

D Rebecca Florance, B Prabhakar… - Journal of …, 2022 - Wiley Online Library
Arithmetic and logical unit (ALU) are the core operational programmable logic block in
microprocessors, microcontrollers, and real‐time‐integrated circuits. The conventional ALUs …

Implementation of parallel computing and adiabatic logic in full adder design for ultra-low-power applications

D Kumar, M Kumar - SN Applied Sciences, 2020 - Springer
In this work, the idea of parallel computing for a full adder has been proposed. Based on
parallel computing, a new architecture of full adder (AI) has been proposed in which the …

Design of joint reconfigurable hybrid adder and subtractor using FinFET and GnrFET technologies

DR Florance, B Prabhakar - Integration, 2023 - Elsevier
Many applications, such as integrated circuit based digital signal processors (DSPs) and
arithmetic logical units (ALUs), rely on adders and subtractors, which are fundamental …

Design of 0.8 V, 22 nm DG-FinFET based efficient VLSI multiplexers

B Jeevan, K Sivani - Microelectronics Journal, 2021 - Elsevier
Conventional CMOS has become successful logic for most digital VLSI circuits and a good
candidate in terms of power dissipation. But due to its dual nature, more transistors are …

Gate all around carbon nanotube field effect transistor espoused discrepancy cascode pass transistor adiabatic logic for ultra-low power application

B Jyothi, BVR Reddy, M Jhamb - Integration, 2025 - Elsevier
Advances in wearable technology, IoT, and mobile applications have increased the demand
for ultra-low-power electronic devices. Adiabatic Logic Circuit (ALC) is a design technique …

Design of FinFET and GnrFET Based Full Adder Cell Using Multiplexer Selection Logic

DR Florance, B Prabhakar - 2022 4th International Conference …, 2022 - ieeexplore.ieee.org
As transistor dimensions shrink to sub-micron sizes, new difficulties like as power efficiency
and unnoticed radiation impacts have become major concerns in the field of very large-scale …

Review on Logic Styles in CMOS and FinFET Technology

S Sasikala, P Sivaranjani, K Saravanan… - 2024 15th …, 2024 - ieeexplore.ieee.org
The CMOS technology provides both analog and digital circuits with low power, easy layout
and so on. Along with this advancement, the CMOS contain limitations like power leakage …

[PDF][PDF] Role of tuning techniques in advancing the performance of negative capacitance field effecting based full adder

R Daniel, B Prasad, A Chaturvedi… - Int J Reconfigurable & …, 2024 - academia.edu
The increasing demand for faster, robust, and efficient device development of enabling
technology to mass production of industrial research in circuit design deals with challenges …

VLSI implementation of wave shaping diode based adiabatic logic (WSDAL)

D Kumar, M Kumar - International Journal of Electronics, 2021 - Taylor & Francis
This paper presents a new architecture of energy recycling for low power applications. The
reported design is based on the ultra-low-power diode Based on this concept, adiabatic …