User interface system, method, and computer program product

MS Smith - US Patent 9,417,754, 2016 - Google Patents
A system, method, and computer program product are provided for a touch or pressure
signal-based interface. In operation, a touch or pressure signal is received in association …

DAMOV: A new methodology and benchmark suite for evaluating data movement bottlenecks

GF Oliveira, J Gómez-Luna, L Orosa, S Ghose… - IEEE …, 2021 - ieeexplore.ieee.org
Data movement between the CPU and main memory is a first-order obstacle against improv
ing performance, scalability, and energy efficiency in modern systems. Computer systems …

A survey of architectural techniques for DRAM power management

S Mittal - … Journal of High Performance Systems Architecture, 2012 - inderscienceonline.com
Recent trends of CMOS technology scaling and wide-spread use of multicore processors
have dramatically increased the power consumption of main memory. It has been estimated …

Reducing memory interference in multicore systems via application-aware memory channel partitioning

SP Muralidhara, L Subramanian, O Mutlu… - Proceedings of the 44th …, 2011 - dl.acm.org
Main memory is a major shared resource among cores in a multicore system. If the
interference between different applications' memory requests is not controlled effectively …

[PDF][PDF] Research problems and opportunities in memory systems

O Mutlu, L Subramanian - Supercomputing frontiers and …, 2014 - superfri.susu.ru
The memory system is a fundamental performance and energy bottleneck in almost all
computing systems. Recent system design, application, and technology trends that require …

Load value approximation

J San Miguel, M Badr, NE Jerger - 2014 47th Annual IEEE …, 2014 - ieeexplore.ieee.org
Approximate computing explores opportunities that emerge when applications can tolerate
error or inexactness. These applications, which range from multimedia processing to …

Row buffer locality aware caching policies for hybrid memories

HB Yoon, J Meza, R Ausavarungnirun… - 2012 IEEE 30th …, 2012 - ieeexplore.ieee.org
Phase change memory (PCM) is a promising technology that can offer higher capacity than
DRAM. Unfortunately, PCM's access latency and energy are higher than DRAM's and its …

Multiple class memory systems

MS Smith - US Patent 8,930,647, 2015 - Google Patents
US8930647B1 - Multiple class memory systems - Google Patents US8930647B1 - Multiple class
memory systems - Google Patents Multiple class memory systems Download PDF Info …

Heteroos: Os design for heterogeneous memory management in datacenter

S Kannan, A Gavrilovska, V Gupta… - Proceedings of the 44th …, 2017 - dl.acm.org
Heterogeneous memory management combined with server virtualization in datacenters is
expected to increase the software and OS management complexity. State-of-the-art …

Towards high performance paged memory for GPUs

T Zheng, D Nellans, A Zulfiqar… - … Symposium on High …, 2016 - ieeexplore.ieee.org
Despite industrial investment in both on-die GPUs and next generation interconnects, the
highest performing parallel accelerators shipping today continue to be discrete GPUs …