This paper addresses the opportunities and challenges of wet and dry selective etches in
the integration of gate-all-around (GAA) field-effect transistor (FET), which is emerging as a …

We report on forksheet field-effect transistors that are isolated from the substrate by bottom
dielectric isolation (BDI) formed by replacing a SiGe epitaxial layer with a dielectric film while …

The processing of gate-all-around (GAA) Si transistors requires several isolated and
vertically stacked nanometer-thick Si sheets or wires. For this purpose, the sacrificial SiGe …

Nondestructive measurement of three-dimensional subsurface features remains one of the
most difficult and unmet challenges faced during the fabrication of three-dimensional …

The need for precise control of nanoscale geometric features poses a challenge in
manufacturing advanced gate-all-around nanotransistors. The high material selectivity …

Nanosheet Field-Effect Transistors (FETs) are candidates to replace today's finFETs as they
offer both an enhanced electrostatic control and a reduced footprint. The processing of these …

One of the main challenges in the fabrication of nanoelectronics using top-down patterning
strategies is the alignment between subsequent patterning steps. As a result, bottom-up …