ALIGN: A system for automating analog layout

T Dhar, K Kunal, Y Li, M Madhusudan… - IEEE Design & …, 2020 - ieeexplore.ieee.org
ALIGN: A System for Automating Analog Layout Page 1 8 2168-2356/20©2020 IEEE
Copublished by the IEEE CEDA, IEEE CASS, IEEE SSCS, and TTTC IEEE Design&Test …

Analog Integrated Circuit Routing Techniques: An Extensive Review

RMF Martins, NCC Lourenço - IEEE Access, 2023 - ieeexplore.ieee.org
Routing techniques for analog and radio-frequency (A/RF) integrated circuit (IC) design
automation have been proposed in the literature for over three decades. On those, an …

Classification of analog synthesis tools based on their architecture selection mechanisms

E Martens, G Gielen - Integration, 2008 - Elsevier
This overview paper presents a classification and brief descriptions of design strategies
supported by analog EDA tools developed by researchers and companies in recent history …

Parasitic-aware optimization and retargeting of analog layouts: A symbolic-template approach

L Zhang, N Jangkrajarng… - IEEE Transactions on …, 2008 - ieeexplore.ieee.org
Layout parasitics can significantly affect the performance of analog integrated circuits (ICs).
In this paper, a systematic method of optimizing an existing analog layout considering …

Fast analog layout prototyping for nanometer design migration

YP Weng, HM Chen, TC Chen, PC Pan… - 2011 IEEE/ACM …, 2011 - ieeexplore.ieee.org
This paper presents an analog layout migration methodology to quickly provide multiple
layouts while keeping similar or better circuit performance. Unlike previous works that often …

Laygen-automatic layout generation of analog ics from hierarchical template descriptions

N Lourenço, M Vianello, J Guilherme… - 2006 Ph. D. Research …, 2006 - ieeexplore.ieee.org
This paper describes an innovative analog IC layout generation tool based on evolutionary
computation techniques. The proposed approach starts by a high level layout description …

Multilevel symmetry-constraint generation for retargeting large analog layouts

S Bhattacharya, N Jangkrajarng… - IEEE Transactions on …, 2006 - ieeexplore.ieee.org
The strong impact of layout intricacies on analog-circuit performance poses great challenges
to analog layout automation. Recently, template-based methods have been shown to be …

A fast prototyping framework for analog layout migration with planar preservation

PC Pan, CY Chin, HM Chen, TC Chen… - … on Computer-Aided …, 2015 - ieeexplore.ieee.org
Analog layout generation in the advanced CMOS design is challenging by its increasing
layout constraints and performance requirements. This situation becomes more intricate by …

Chameleon ART: A non-optimization based analog design migration framework

S Hammouda, H Said, M Dessouky, M Tawfik… - Proceedings of the 43rd …, 2006 - dl.acm.org
Presented in this paper is a tool that automatically migrates analog designs from one
process to another while keeping circuit and layout topologies. A netlist migration engine …

[图书][B] Variation-aware analog structural synthesis

T McConaghy, P Gao, M Steyaert, P Palmers, G Gielen - 2009 - Springer
This book describes new tools for front end analog designers, starting with global variation-
aware sizing, and extending to novel variation-aware topology design. The tools aid design …