Multi-core devices for safety-critical systems: A survey

JP Cerrolaza, R Obermaisser, J Abella… - ACM Computing …, 2020 - dl.acm.org
Multi-core devices are envisioned to support the development of next-generation safety-
critical systems, enabling the on-chip integration of functions of different criticality. This …

A survey of techniques for reducing interference in real-time applications on multicore platforms

T Lugo, S Lozano, J Fernández, J Carretero - IEEE Access, 2022 - ieeexplore.ieee.org
This survey reviews the scientific literature on techniques for reducing interference in real-
time multicore systems, focusing on the approaches proposed between 2015 and 2020. It …

Analysis of memory-contention in heterogeneous cots mpsocs

M Hassan, R Pellizzoni - … on Real-Time Systems (ECRTS 2020), 2020 - drops.dagstuhl.de
Abstract Multiple-Processors Systems-on-Chip (MPSoCs) provide an appealing platform to
execute Mixed Criticality Systems (MCS) with both time-sensitive critical tasks and …

Bounding dram interference in cots heterogeneous mpsocs for mixed criticality systems

M Hassan, R Pellizzoni - IEEE Transactions on Computer-Aided …, 2018 - ieeexplore.ieee.org
Commercial off-the-shelf (COTS) heterogeneous multiple processors systems-on-chip
(MPSoCs) are appealing platforms for emerging mixed criticality systems (MCSs). To satisfy …

Enabling fog-based industrial robotics systems

MS Shaik, V Struhár, Z Bakhshi, VL Dao… - 2020 25th IEEE …, 2020 - ieeexplore.ieee.org
Low latency and on demand resource availability enable fog computing to host industrial
applications in a cloud like manner. One industrial domain which stands to benefit from the …

Contention-aware dynamic memory bandwidth isolation with predictability in COTS multicores: An avionics case study

A Agrawal, G Fohler, J Freitag… - … Conference on Real …, 2017 - drops.dagstuhl.de
Airbus is investigating COTS multicore platforms for safety-critical avionics applications,
pursuing helicopter-style autonomous and electric aircraft. These aircraft need to be ultra …

{MT^ 2}: Memory Bandwidth Regulation on Hybrid {NVM/DRAM} Platforms

J Yi, B Dong, M Dong, R Tong, H Chen - 20th USENIX Conference on …, 2022 - usenix.org
Non-volatile memory (NVM) has emerged as a new memory media, resulting in a hybrid
NVM/DRAM configuration in typical servers. Memory-intensive applications competing for …

Is your bus arbiter really fair? restoring fairness in axi interconnects for fpga socs

F Restuccia, M Pagani, A Biondi, M Marinoni… - ACM Transactions on …, 2019 - dl.acm.org
AMBA AXI is a popular bus protocol that is widely adopted as the medium to exchange data
in field-programmable gate array system-on-chips (FPGA SoCs). The AXI protocol does not …

Memory latency distribution-driven regulation for temporal isolation in mpsocs

A Saeed, D Hoornaert, D Dasari… - … Conference on Real …, 2023 - drops.dagstuhl.de
Temporal isolation is one of the most significant challenges that must be addressed before
Multi-Processor Systems-on-Chip (MPSoCs) can be widely adopted in mixed-criticality …

Toward holistic performance management in clouds: taxonomy, challenges and opportunities

N Fareghzadeh, MA Seyyedi… - The Journal of …, 2019 - Springer
Cloud computing is an evolving paradigm with tremendous momentum. Performance is a
major challenge in providing cloud services, and performance management is prerequisite …