DAMHSE: Programming heterogeneous MPSoCs with hardware acceleration using dataflow-based design space exploration and automated rapid prototyping
Abstract Heterogeneous Multiprocessor Systems-on-a-Chip (MPSoCs) with programmable
hardware acceleration are currently gaining market share in the embedded device domain …
hardware acceleration are currently gaining market share in the embedded device domain …
Optimizing openvx graphs for data movement
M Abeysinghe, J Villarreal, JD Bakos - Authorea Preprints, 2024 - techrxiv.org
This paper describes a method for automatically transforming the structure and
characteristics of an image processing dataflow graph for the purpose of improving …
characteristics of an image processing dataflow graph for the purpose of improving …
OpTIFlow–An optimized end-to-end dataflow for accelerating deep learning workloads on heterogeneous SoCs
S Jagannathan, V Pothukuchi, J Villarreal… - Electronic …, 2023 - library.imaging.org
A typical edge compute SoC capable of handling deep learning workloads at low power is
usually heterogeneous by design. It typically comprises multiple initiators such as real-time …
usually heterogeneous by design. It typically comprises multiple initiators such as real-time …
Single chip auto-valet parking system with tda4vmid soc
Auto-Valet parking is a key emerging function for Advanced Driver Assistance Systems
(ADAS) enhancing traditional surround view system providing more autonomy during …
(ADAS) enhancing traditional surround view system providing more autonomy during …
Enhancing Connected Cooperative ADAS: Deep Learning Perception in an Embedded System Utilizing Fisheye Cameras
This paper explores the potential of Cooperative Advanced Driver Assistance Systems (C-
ADAS) that leverage Vehicle-to-Everything (V2X) communication to enhance road safety …
ADAS) that leverage Vehicle-to-Everything (V2X) communication to enhance road safety …
System data flow pipelining for embedded heterogenous socs using openvx
Due to end of Dennard Scaling, the latest chip architectures are multi-core, with each core
customized for specific domains eg computer vision, deep learning, graphics, signal …
customized for specific domains eg computer vision, deep learning, graphics, signal …
Openvx graph optimization for visual processor units
M Abeysinghe, J Villarreal, L Weaver… - 2019 IEEE 30th …, 2019 - ieeexplore.ieee.org
OpenVX is a standardized, cross-platform software framework to aid in development of
accelerated computer vision, machine learning, and other signal processing applications …
accelerated computer vision, machine learning, and other signal processing applications …
Automated Data-Flow Optimization for Digital Signal Processors
MT Abeysinghe - 2024 - search.proquest.com
Digital signal processors (DSP), which are characterized by statically-scheduled Very-Long
Instruction Word architectures and software-defined scratchpad memory, are currently the go …
Instruction Word architectures and software-defined scratchpad memory, are currently the go …
Enhancing Connected Cooperative ADAS: Deep Learning Perception in an Embedded System Utilizing Fisheye Cameras
G Velez, C Pérez-Benito, D Pujol, A Miranda… - … , Computer Vision and … - books.google.com
This paper explores the potential of Cooperative Advanced Driver Assistance Systems (C-
ADAS) that leverage Vehicle-to-Everything (V2X) communication to enhance road safety …
ADAS) that leverage Vehicle-to-Everything (V2X) communication to enhance road safety …