IBM POWER8 processor core microarchitecture

B Sinharoy, JA Van Norstrand… - IBM Journal of …, 2015 - ieeexplore.ieee.org
The POWER8™ processor is the latest RISC (Reduced Instruction Set Computer)
microprocessor from IBM. It is fabricated using the company's 22-nm Silicon on Insulator …

Ibm power6 microarchitecture

HQ Le, WJ Starke, JS Fields… - IBM Journal of …, 2007 - ieeexplore.ieee.org
This paper describes the implementation of the IBM POWER6™ microprocessor, a two-way
simultaneous multithreaded (SMT) dual-core chip whose key features include binary …

IBM POWER7 multicore server processor

B Sinharoy, R Kalla, WJ Starke, HQ Le… - IBM Journal of …, 2011 - ieeexplore.ieee.org
The IBM POWER® processor is the dominant reduced instruction set computing
microprocessor in the world today, with a rich history of implementation and innovation over …

Improved design of high-performance parallel decimal multipliers

A Vazquez, E Antelo… - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
The new generation of high-performance decimal floating-point units (DFUs) is demanding
efficient implementations of parallel decimal multipliers. In this paper, we describe the …

Decimal floating-point support on the IBM System z10 processor

EM Schwarz, JS Kapernick… - IBM Journal of Research …, 2009 - ieeexplore.ieee.org
The latest IBM zSeries® processor, the IBM System z10™ processor, provides hardware
support for the decimal floating-point (DFP) facility that was introduced on the IBM System …

IBM z10: The next-generation mainframe microprocessor

CF Webb - IEEE micro, 2008 - ieeexplore.ieee.org
The IBM system z10 includes four microprocessor cores-each with a private 3-Mbyte cache-
and integrated accelerators for decimal floating-point computation, cryptography, and data …

Design of efficient BCD adders in quantum-dot cellular automata

G Cocorullo, P Corsonello, F Frustaci… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
Among the emerging technologies recently proposed as alternatives to the classic CMOS,
quantum-dot cellular automata (QCA) is one of the most promising solutions to design …

High-speed parallel decimal multiplication with redundant internal encodings

L Han, SB Ko - IEEE Transactions on Computers, 2012 - ieeexplore.ieee.org
The decimal multiplication is one of the most important decimal arithmetic operations which
have a growing demand in the area of commercial, financial, and scientific computing. In this …

The IBM zEnterprise-196 decimal floating-point accelerator

S Carlough, A Collura, S Mueller… - 2011 IEEE 20th …, 2011 - ieeexplore.ieee.org
Decimal floating-point Arithmetic is widely used in commercial computing applications, such
as financial transactions, where rounding errors prevent the use of binary floating-point …

A fully redundant decimal adder and its application in parallel decimal multipliers

S Gorgin, G Jaberipur - Microelectronics Journal, 2009 - Elsevier
Decimal hardware arithmetic units have recently regained popularity, as there is now a high
demand for high performance decimal arithmetic. We propose a novel method for carry-free …