Power consumption and energy efficiency are becoming critical aspects in the design and operation of large scale HPC facilities, and it is unanimously recognised that future exascale …
While Moore's law states that the number of transistors is approximately doubled every 2 years, powering these transistors simultaneously is only possible as long as Dennard …
JM Cebrian, L Natvig, JC Meyer - 2012 SC Companion: High …, 2012 - ieeexplore.ieee.org
Driven by the utilization wall and the Dark Silicon effect, energy efficiency has become a key research area in microprocessor design. Vectorization, parallelization, specialization and …
Energy consumption constraints on computing systems are more important than ever. Maintenance costs for high performance systems are limiting the applicability of processing …
In this paper we introduce a redesign of the conjugate gradient method for the iterative solution of sparse linear systems on heterogeneous systems accelerated by graphics …
Asynchronous methods minimize idle times by removing synchronization barriers, and therefore allow the efficient usage of computer systems. The implied high tolerance with …
H Lien, L Natvig, A Al Hasib, JC Meyer - ICT as Key Technology against …, 2012 - Springer
In this paper, we present three performance and energy case studies of benchmark applications in the OmpSs environment for task based programming. Different parallel and …
Y Gao, F Zhang, JD Bakos - 2014 IEEE High Performance …, 2014 - ieeexplore.ieee.org
In this paper we describe an implementation of sparse matrix-vector multiply (SpMV) on the Texas Instruments (TI) Keystone II architecture. The Keystone II is an eight core Digital …
Optimizing a particular subprogram out of the set of Basic (sparse) Linear Algebra Subprograms (BLAS) for a given architecture is a common topic of research. In applications …