The vedic design-carry look ahead (VD-CLA): a smart and hardware-friendly implementation...

FPGA design of arithmetic optimised APT-VDF using reusable Vedic multiplier with simplified combinational logics for medical signal denoising

NA Manga, G Pradeep Kumar… - … Journal of Electronics, 2024 - Taylor & Francis
ABSTRACT All-pass transformation (APT)-based variable digital filters (VDFs) can be used
in different biomedical signal-processing applications, particularly in electrocardiograph …
被引用次数：3 相关文章 所有 3 个版本

Capricious Digital Filter Design and Implementation Using Baugh–Wooley Multiplier and Error Reduced Carry Prediction Approximate Adder for ECG Noise Removal …

K Saritha Raj, P Rajesh Kumar… - Circuits, Systems, and …, 2023 - Springer
Capricious digital filter (CDF) plays a significant role of signal processing application field to
eradicate noise. Any prototype filter desired frequency response is attained by developing …
被引用次数：4 相关文章 所有 2 个版本

Evaluation of Novel 16-Bit Vedic Multiplier Using Carry Look Ahead Adder for High Speed and Low Area in Comparison with Carry Select Adder

DS Teja, P Jagadeesh - 2024 International Conference on …, 2024 - ieeexplore.ieee.org
This research evaluates a unique carry look ahead adder (CLA) 16-bit Vedic multiplier's
efficiency. Optimise speed and space utilisation and compare it to the standard carry select …
被引用次数：1 相关文章