Two-level logic minimization: an overview

O Coudert - Integration, 1994 - Elsevier
Fourty years ago Quine noted that finding a procedure that computes a minimal sum
products for a given propositional formula is very complex, even though propositional …

Towards evaluating the robustness of neural networks

N Carlini, D Wagner - 2017 ieee symposium on security and …, 2017 - ieeexplore.ieee.org
Neural networks provide state-of-the-art results for most machine learning tasks.
Unfortunately, neural networks are vulnerable to adversarial examples: given an input x and …

Binary decision diagrams in theory and practice

R Drechsler, D Sieling - International Journal on Software Tools for …, 2001 - Springer
Decision diagrams (DDs) are the state-of-the-art data structure in VLSI CAD and have been
successfully applied in many other fields. DDs are widely used and are also integrated in …

Model checking and abstraction

EM Clarke, O Grumberg, DE Long - ACM transactions on Programming …, 1994 - dl.acm.org
We describe a method for using abstraction to reduce the complexity of temporal-logic
model checking. Using techniques similar to those involved in abstract interpretation, we …

NuSMV: a new symbolic model checker

A Cimatti, E Clarke, F Giunchiglia, M Roveri - International journal on …, 2000 - Springer
This paper describes a new symbolic model checker, called NuSMV, developed as part of a
joint project between CMU and IRST. NuSMV is the result of the reengineering …

Algebric decision diagrams and their applications

RI Bahar, EA Frohm, CM Gaona, GD Hachtel… - Formal methods in …, 1997 - Springer
In this paper we present theory and experimental results on Algebraic Decision Diagrams.
These diagrams extend BDDs by allowing values from an arbitrary finite domain to be …

Multi-terminal binary decision diagrams: An efficient data structure for matrix representation

M Fujita, PC McGeer, JCY Yang - Formal methods in system design, 1997 - Springer
In this paper, we discuss the use of binary decision diagrams to represent general matrices.
We demonstrate that binary decision diagrams are an efficient representation for every …

Formal verification in hardware design: a survey

C Kern, MR Greenstreet - ACM Transactions on Design Automation of …, 1999 - dl.acm.org
In recent years, formal methods have emerged as an alternative approach to ensuring the
quality and correctness of hardware designs, overcoming some of the limitations of …

Symbolic model checking for sequential circuit verification

JR Burch, EM Clarke, DE Long… - IEEE Transactions on …, 1994 - ieeexplore.ieee.org
The temporal logic model checking algorithm of Clarke, Emerson, and Sistla (1986) is
modified to represent state graphs using binary decision diagrams (BDD's) and partitioned …

Better verification through symmetry

C Norris Ip, DL Dill - Formal methods in system design, 1996 - Springer
A fundamental difficulty in automatic formal verification of finite-state systems is the state
explosion problem—even relatively simple systems can produce very large state spaces …