Power dissipation is rapidly becoming a limiting factor in high performance microprocessor
design due to ever increasing device counts and clock rates. The 21264 is a third generation …

Three generations of Alpha microprocessors have been designed using a proven custom
design methodology. The performance of these microprocessors was optimized by focusing …

Provides the only up-to-date source on the most recent advances in this often complex and
fascinating topic. The only book to be entirely devoted to clocking Clocking has become one …

The Spert-II fixed point vector microprocessor system performs training and recall faster than
commercial workstations for neural networks used in speech recognition research. We have …

This paper describes a new technique for integrating asynchronous modules within a high-
speed synchronous pipeline. Our design eliminates potential metastability problems by …

It is widely accepted that the disproportionate scaling of transistor and conventional on-chip
interconnect performance presents a major barrier to future high performance systems …

Since caches consume a significant fraction of total processor energy, eg, 43% for
StrongARM-1 [8], many studies have investigated energy-efficient cache designs [1, 5, 12 …

A summary of electrical and optical approaches to clock distribution within high-performance
microprocessors is presented. System-level properties of intrachip electrical clock …

Instruction caches consume a large fraction of the total power in modern low-power
microprocessors. In particular, set-associative caches, which are preferred because of lower …

High-performance clock distribution has been a challenge for nearly three decades. During
this time, clock synthesis tools and algorithms have strove to address a myriad of important …