Chip-Package-Board codesign Methodology for Energy Harvesting DC-DC Boost Converters
In this work, a DC-DC converter design package-chip methodology is proposed, aiming on
the successful codesign of the on-chip DC-DC converter with the package wire bonds and …
the successful codesign of the on-chip DC-DC converter with the package wire bonds and …
Equivalent circuit model of coaxial probes for patch antennas
An equivalent circuit model of coaxial probes is derived directly from the intrinsic via circuit
model. As all the higher-order evanescent modes have been included analytically in the …
model. As all the higher-order evanescent modes have been included analytically in the …
Silicon based vertical micro-coaxial transition for high frequency packaging technologies
J Boone, S Krishnan, S Bhansali - Progress In Electromagnetics Research …, 2013 - jpier.org
A through wafer vertical micro-coaxial transition flushed in a silicon substrate has been
designed, fabricated, and tested. The transition has been designed using radio frequency …
designed, fabricated, and tested. The transition has been designed using radio frequency …
Passive equalizer design on high density interconnects for 25Gbps high speed IO and beyond
We propose a passive equalizer design on high density interconnects to improve the serial
chip-to-chip communication channel performance. This new technique is a novel …
chip-to-chip communication channel performance. This new technique is a novel …
Build-Up spiral and GND vias for improving signal integrity of signal core vias
ML Kung, LY Lin, KH Lin, HH Cheng… - IEEE Transactions …, 2021 - ieeexplore.ieee.org
Impedance mismatch of vias is one of the factors most strongly affecting the signal integrity
of the signal routing on printed circuit boards and IC packages. As an alternative to current …
of the signal routing on printed circuit boards and IC packages. As an alternative to current …
An Ultra Low Loss SerDes Signal Design on a FC Package Applied in 56 Gbps Networks
YH Chou, TL Hsieh, CY Tsai, CC Wang… - 2016 IEEE 66th …, 2016 - ieeexplore.ieee.org
Recently, data transmission volumes of internet networks have grown explosively because
most of consumer devices, such as smartphones, tablets, wearable devices, etc., all employ …
most of consumer devices, such as smartphones, tablets, wearable devices, etc., all employ …
Return-loss minimization of package interconnects through input space mapping using FEM-based models
JC Cervantes-González, CA López… - 2013 SBMO/IEEE …, 2013 - ieeexplore.ieee.org
Highly efficient CAD methodologies based on full-wave EM analysis, for the design of
package interconnects are necessary due to the increased frequencies of operation and a …
package interconnects are necessary due to the increased frequencies of operation and a …
Barbed transmission lines for crosstalk suppression
As the increasing demand of small form factor and low-cost package drives the interconnect
density, crosstalk noise due to the parasitic components set the limitation in off-die high …
density, crosstalk noise due to the parasitic components set the limitation in off-die high …
Package stiffener optimization for high speed signal integrity and electromagnetic compatibility
B Wu - 2017 18th International Conference on Electronic …, 2017 - ieeexplore.ieee.org
In this paper, we study the electrical performance of a flip-chip ball grid array package
assembled with a alloy steel stiffener on top. The metal plate on the chip package could …
assembled with a alloy steel stiffener on top. The metal plate on the chip package could …
High speed vertical interconnect analysis for dense pin assignment optimization using electromagnetic multiple scattering techniques
B Wu - … International Conference on Electronics Packaging and …, 2018 - ieeexplore.ieee.org
A pin assignment evaluation scheme based on electromagnetic multiple scattering
techniques is proposed for massive highly-dense vertical interconnects in advanced …
techniques is proposed for massive highly-dense vertical interconnects in advanced …