A 0.5-mW passive telemetry IC for biomedical applications

Q Huang, M Oberle - IEEE Journal Of solid-state circuits, 1998 - ieeexplore.ieee.org
A low-power, single-chip, one-channel, fully implantable microtransponder system for low-
frequency biomedical sensor applications is described. The circuit is powered by an external …

Switched-opamp: An approach to realize full CMOS switched-capacitor circuits at very low power supply voltages

J Crols, M Steyaert - IEEE Journal of Solid-State Circuits, 1994 - ieeexplore.ieee.org
The implementation of analog CMOS circuits that operate in the very low power supply
voltage range (1 V to 2 V) becomes more important nowadays. Most accurate filter circuits …

[图书][B] Top-down design of high-performance sigma-delta modulators

F Medeiro, BP Verdú, A Rodríguez-Vázquez - 2013 - books.google.com
The interest for: I:~ modulation-based NO converters has significantly increased in the last
years. The reason for that is twofold. On the one hand, unlike other converters that need …

[图书][B] VLSI Analog Filters: Active RC, OTA-C, and SC

PVA Mohan - 2012 - books.google.com
Great strides have been made in the development of analog filters over the past few
decades. The first book to treat these recent advances in depth, VLSI Analog Filters provides …

A high-performance multibit/spl Delta//spl Sigma/CMOS ADC

Y Geerts, MSJ Steyaert… - IEEE Journal of Solid-State …, 2000 - ieeexplore.ieee.org
The design of a multibit/spl Delta//spl Sigma/converter is presented. It uses a third-order 4-
bit/spl Delta//spl Sigma/topology with data weighted averaging (DWA) to reduce the linearity …

A high-level simulation and synthesis environment for/spl Delta//spl Sigma/modulators

K Francken, GGE Gielen - IEEE Transactions on Computer …, 2003 - ieeexplore.ieee.org
An approach is presented for the high-level simulation and synthesis of discrete-time/spl
Delta//spl Sigma/modulators based on a simulation-based optimization strategy. The high …

Modeling opamp-induced harmonic distortion for switched-capacitor/spl Sigma//spl Delta/modulator design

F Medeiro, B Perez-Verdu… - … on Circuits and …, 1994 - ieeexplore.ieee.org
This communication reports a new modeling of opamp-induced harmonic distortion in
SC/spl Sigma//spl Delta/modulators, which is aimed at the optimum design of this kind of …

[图书][B] CMOS Analog Integrated Circuits

T Ndjountche - 2019 - api.taylorfrancis.com
Hardware developments have been a major vehicle in popularizing the applications of
signal processing theory in both science and engineering. The book describes the important …

An 8-bit 200-MSample/s pipelined ADC with mixed-mode front-end S/H circuit

S Jiang, MA Do, KS Yeo, WM Lim - IEEE Transactions on …, 2008 - ieeexplore.ieee.org
This paper describes an 8-bit pipelined analog-to-digital converter (ADC) using a mixed-
mode sample-and-hold (S/H) circuit at the front-end. The mixed-mode sampling technique …

A 15-b resolution 2-MHz Nyquist rate/spl Delta//spl Sigma/ADC in a 1-/spl mu/m CMOS technology

AM Marques, V Peluso, MSJ Steyaert… - IEEE Journal of Solid …, 1998 - ieeexplore.ieee.org
A high-resolution high-speed fourth-order cascaded/spl Delta//spl Sigma/analog-to-digital
converter, based on a 2-1-1 topology, is presented. The converter is implemented with fully …