Optimal interconnection trees in the plane

M Brazil, M Zachariasen - Algorithms and Combinatorics, 2015 - Springer
Physical networks are pervasive in our society. They range from the traditional copper
networks in telecommunications to the modern optical cable networks used for broadband …

BonnRoute: Algorithms and data structures for fast and good VLSI routing

M Gester, D Müller, T Nieberg, C Panten… - ACM Transactions on …, 2013 - dl.acm.org
We present the core elements of BonnRoute: advanced data structures and algorithms for
fast and high-quality routing in modern technologies. Global routing is based on a …

Delay-driven layer assignment in global routing under multi-tier interconnect structure

J Ao, S Dong, S Chen, S Goto - Proceedings of the 2013 ACM …, 2013 - dl.acm.org
A multilayer routing system usually adopts multiple interconnect configuration with different
wire sizes and thicknesses. Since thicker layers of metal lead to fatter wires with smaller …

Routing congestion estimation with real design constraints

WH Liu, Y Wei, C Sze, CJ Alpert, Z Li, YL Li… - Proceedings of the 50th …, 2013 - dl.acm.org
To address the routability issue, routing congestion estimators (RCE) become essential in
industrial design flow. Recently, several RCEs [1-4] based on global routing engines are …

A maze routing-based methodology with bounded exploration and path-assessed retracing for constrained multilayer obstacle-avoiding rectilinear Steiner tree …

KW Lin, YS Lin, YL Li, RB Lin - ACM Transactions on Design Automation …, 2018 - dl.acm.org
Owing to existing intellectual properties, prerouted nets, and power/ground wires, the routing
of a system on chip design demands to detour around multilayer obstacles. Traditional …

An enhanced global router with consideration of general layer directives

TH Lee, YJ Chang, TC Wang - … of the 2011 international symposium on …, 2011 - dl.acm.org
In this paper we study a global routing problem that considers not only overflow and
wirelength but also layer directives. A layer directive is often given to a timing-critical net for …

GLADE: A modern global router considering layer directives

YJ Chang, TH Lee, TC Wang - 2010 IEEE/ACM International …, 2010 - ieeexplore.ieee.org
Global routing is a very crucial stage in a design cycle, because it physically plans the routes
of nets on a chip. In order to boost the research and development of global routing …

Delay-driven and antenna-aware layer assignment in global routing under multitier interconnect structure

S Dong, J Ao, F Luo - … on Computer-Aided Design of Integrated …, 2015 - ieeexplore.ieee.org
A multilayer routing system usually adopts multiple interconnect configuration with different
wire sizes and thicknesses. Since thicker layers of metal lead to fatter wires with smaller …

Continuous Routing

P Saccardi - 2022 - bonndoc.ulb.uni-bonn.de
Global routing is an essential stage of a chip design flow: as a simplification of the routing
problem, it optimizes global objectives such as wire length, power and timing, while relaxing …

RC Parasitic-Aware Layout Analysis and Routing Optimization Methodology

MS Abouelyazid, S Hammouda, Y Ismail - IEEE Access, 2022 - ieeexplore.ieee.org
A parasitic-aware routing optimization and analysis methodology for integrated circuits is
developed based on an incremental parasitic extraction and a fast optimization …