Antenna-on-chip and antenna-in-package solutions to highly integrated millimeter-wave devices for wireless communications

YP Zhang, D Liu - IEEE transactions on antennas and …, 2009 - ieeexplore.ieee.org
Antenna-on-chip (AoC) and antenna-in-package (AiP) solutions are studied for highly
integrated millimeter-wave (mmWave) devices in wireless communications. First, the …

Antenna-in-package design for wirebond interconnection to highly integrated 60-GHz radios

YP Zhang, M Sun, KM Chua, LL Wai… - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
This paper first presents a quasi-cavity-backed, guard-ring-directed, substrate-material-
modulated slot antenna. The antenna, intended for use in highly integrated 60-GHz radios …

Millimeter-wave low power and miniature CMOS multicascode low-noise amplifiers with noise reduction topology

BJ Huang, KY Lin, H Wang - IEEE Transactions on Microwave …, 2009 - ieeexplore.ieee.org
In this paper, the design and analysis of CMOS multicascode configuration with noise
reduction topology are proposed. Two low power and miniature low-noise amplifiers (LNAs) …

Millimeter-wave integrated circuits in 65-nm CMOS

M Varonen, M Karkkainen, M Kantanen… - IEEE Journal of Solid …, 2008 - ieeexplore.ieee.org
We present the design and measurement results of millimeter-wave integrated circuits
implemented in 65-nm baseline CMOS. Both active and passive test structures were …

Analysis and design of millimeter-wave low-voltage CMOS cascode LNA with magnetic coupled technique

HC Yeh, CC Chiong, S Aloui… - IEEE transactions on …, 2012 - ieeexplore.ieee.org
In this paper, the design and analysis of CMOS low-noise amplifiers (LNAs) with a magnetic
coupled technique in different cascode topologies are proposed. To minimize the noise …

A 64 GHz LNA with 15.5 dB gain and 6.5 dB NF in 90 nm CMOS

S Pellerano, Y Palaskas… - IEEE Journal of Solid …, 2008 - ieeexplore.ieee.org
This paper presents an integrated LNA for millimeter-wave applications implemented in 90
nm CMOS technology. Modeling methodology based solely on electromagnetic simulations …

A compact E-band power amplifier with gain-boosting and efficiency enhancement

L Chen, L Zhang, Y Wang, Z Yu - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
A compact E-band power amplifier (PA) with gain-boosting and efficiency enhancement
technique is proposed and implemented in a 65-nm CMOS process. The proposed gain …

Analysis and design of millimeter-wave low-power CMOS LNA with transformer-multicascode topology

HC Yeh, ZY Liao, H Wang - IEEE Transactions on Microwave …, 2011 - ieeexplore.ieee.org
In this paper, the analysis and design of a CMOS multicascode configuration with a noise-
reduction transformer topology are presented. Two low-power (LP), miniature, and …

60 GHz transmitter circuits in 65nm CMOS

A Valdes-Garcia, S Reynolds… - 2008 IEEE radio …, 2008 - ieeexplore.ieee.org
This work presents fundamental building blocks for a 60 GHz transmitter front-end. The
circuits are implemented in a 65 nm bulk CMOS technology, operate from a 1.2 V supply …

A low-power high-gain LNA for the 60 GHz band in a 65 nm CMOS technology

M Kraemer, D Dragomirescu… - 2009 Asia Pacific …, 2009 - ieeexplore.ieee.org
One essential building block for integrated 60 GHz CMOS radio transceivers is the low noise
amplifier (LNA). This paper presents a two-stage cascode LNA fabricated in the 65 nm bulk …