SIMDRAM: A framework for bit-serial SIMD processing using DRAM

N Hajinazar, GF Oliveira, S Gregorio… - Proceedings of the 26th …, 2021 - dl.acm.org
Processing-using-DRAM has been proposed for a limited set of basic operations (ie, logic
operations, addition). However, in order to enable full adoption of processing-using-DRAM …

MIMDRAM: An End-to-End Processing-Using-DRAM System for High-Throughput, Energy-Efficient and Programmer-Transparent Multiple-Instruction Multiple-Data …

GF Oliveira, A Olgun, AG Yağlıkçı… - … Symposium on High …, 2024 - ieeexplore.ieee.org
Processing-using-DRAM (PUD) is a processing-in-memory (PIM) approach that uses a
DRAM array's massive internal parallelism to execute very-wide (eg, 16,384-262,144-bit …

Hardware is the new software

A Baumann - Proceedings of the 16th Workshop on Hot Topics in …, 2017 - dl.acm.org
Moore's Law may be slowing, but, perhaps as a result, other measures of processor
complexity are only accelerating. In recent years, Intel's architects have turned to an …

X86-64 instruction usage among c/c++ applications

A Akshintala, B Jain, CC Tsai, M Ferdman… - Proceedings of the 12th …, 2019 - dl.acm.org
This paper presents a study of x86-64 instruction usage across 9,337 C/C++ applications
and libraries in the Ubuntu 16.04 GNU/Linux distribution. We present metrics for reasoning …

Composite-ISA cores: Enabling multi-ISA heterogeneity using a single ISA

A Venkat, H Basavaraj… - 2019 IEEE International …, 2019 - ieeexplore.ieee.org
Heterogeneous multicore architectures are comprised of multiple cores of different sizes,
organizations, and capabilities. These architectures maximize both performance and energy …

SIMDRAM: An end-to-end framework for bit-serial SIMD computing in DRAM

N Hajinazar, GF Oliveira, S Gregorio, J Ferreira… - arXiv preprint arXiv …, 2021 - arxiv.org
Processing-using-DRAM has been proposed for a limited set of basic operations (ie, logic
operations, addition). However, in order to enable full adoption of processing-using-DRAM …

Property-driven automatic generation of reduced-isa hardware

N Bleier, J Sartori, R Kumar - 2021 58th ACM/IEEE Design …, 2021 - ieeexplore.ieee.org
As the diversity of computing workloads and customers continues to increase, so does the
need to customize hardware at low cost for different computing needs. This work focuses on …

Handling IoT platform heterogeneity with COISA, a compact OpenISA virtual platform

R Auler, CE Millani, A Brisighello… - Concurrency and …, 2017 - Wiley Online Library
In face of the high number of different hardware platforms we need to program with Internet‐
of‐Things (IoT), virtual machines (VMs) pose as a promising technology to allow a program …

A study of performance and power consumption differences among different ISAs

A Akram, L Sawalha - 2019 22nd Euromicro Conference on …, 2019 - ieeexplore.ieee.org
Recent advances in different instruction set architectures (ISAs) and their implementations
have revived the argument on the role of ISAs in the overall performance and energy …

The case for flexible isas: unleashing hardware and software

R Auler, E Borin - 2017 29th International Symposium on …, 2017 - ieeexplore.ieee.org
For a long time the Instruction Set Architecture (ISA) has been the firm contract between
software and hardware. This firm contract plays an important role by decoupling the …