Test pattern generation using thermometer code counter in TPC technique for BIST implementation

K Jamal, KM Chari, P Srihari - Microprocessors and Microsystems, 2019 - Elsevier
This paper introduces a newly pattern generation with Test-Per-Clock technique for Built-In-
Self-Test implementation. This proposed test vector generation generates Multiple Single …

A low power 6-bit current-steering DAC in 0.18-μm CMOS process

M Chakir, H Akhamal, H Qjidaa - 2015 Intelligent Systems and …, 2015 - ieeexplore.ieee.org
In our work we are interested in the design of a new architecture of Current-steering DAC
Converter a 6bits, operates at 300MHz sampling rate and 1.8 V supply voltage, implemented …

[PDF][PDF] Design of high output impedance, large voltage compliance output stage of implantable Hypoglossal Nerve Stimulator (HGNS) for OSA treatment

GB Salah, K Abbes, C Abdelmoula… - Advances in Science …, 2020 - academia.edu
Obstructive Sleep Apnea (OSA) is a potentially common sleep disorder manifested in upper
airways' collapse, either partially or completely. If diagnosed late and untreated, it may result …

A Study on Digitally Controlle Oscillators for All-Digital Phase-Locked Loops

JAF da Cruz - 2015 - search.proquest.com
Abstract The" Phase Locked Loop"(PLL) primary uses are in clock recovery and frequency
synthesis applications, being present in several technological devices. The interest relatively …

Design of low power 8-bit DAC using PTM-LP technology

SMI Huq, S Islam, N Saqib… - … Conference on Recent …, 2017 - ieeexplore.ieee.org
With emerging high performance digital circuits, the need for data converters with high
accuracy, high speed and low power for various kinds of applications has increased greatly …

[PDF][PDF] An Innovative Design of ADC and DAC Based Phase Locked Loop

K Ramakanth, L He - Proceedings of the World Congress on Engineering, 2014 - iaeng.org
The project aims at designing an analog phase locked loop based on digitally controlled
feedback loop wherein the digital control loop gathers the locking information in digital …

Contributions à la conception optimale de convertisseurs analogique/numérique pour les capteurs monolithiques à pixel actif en technologie CMOS 0.18 µm

C Mostafa - 2018 - toubkal.imist.ma
La conception d'un capteur monolithique à pixel actif MAPS exprime des exigences strictes
de performance notamment celles relatives au convertisseur analogique-numérique (CAN) …

A 1.2 V 10-bit 500-MS/s current steering DAC in 90nm technology

MK Sreekrishnan - … Conference on Recent Trends in Electronics …, 2016 - ieeexplore.ieee.org
Digital-to-Analog converter (DAC) is a fundamental device in data processing systems. It
serves as a conversion interface to reconstruct the analog signal from the digital output of …

[PDF][PDF] CURRENT STEERING BASED SIXTEEN BIT DIGITAL TO ANALOG CONVERTER USING 8T OPERATIONAL AMPLIFIER

SK Kabilesh - researchgate.net
In electronics, a Digital-to-Analog converter (DAC) is a device that converts digital signal to
an analog signal. In our project, we had proposed a 16-bit, 5MHz current-steering digital-to …

A current-mode DAC unit circuit with smooth transition

Y Ye, Y Xia - Journal of Semiconductors, 2015 - iopscience.iop.org
The digital-to-analogue converter (DAC) plays a significant role in modern electronic
systems, and current-mode DACs are widely used due to their excellent properties …