Operating system concepts for reconfigurable computing: review and survey

M Eckert, D Meyer, J Haase… - International Journal of …, 2016 - Wiley Online Library
One of the key future challenges for reconfigurable computing is to enable higher design
productivity and a more easy way to use reconfigurable computing systems for users that are …

A dynamic partial reconfigurable overlay concept for PYNQ

B Janßen, P Zimprich, M Hübner - 2017 27th International …, 2017 - ieeexplore.ieee.org
Partial reconfiguration is a promising technique in the design of embedded systems since it
enables an increase in efficiency and flexibility. However, its usage is still challenging due to …

Synchronization of faulty processors in coarse-grained TMR protected partially reconfigurable FPGA designs

U Kretzschmar, J Gomez-Cornejo, A Astarloa… - Reliability Engineering & …, 2016 - Elsevier
The expansion of FPGA technology in numerous application fields is a fact. Single Event
Effects (SEE) are a critical factor for the reliability of FPGA based systems. For this reason, a …

Microkernel architecture and hardware abstraction layer of a reliable reconfigurable real-time operating system (R3TOS)

X Iturbe, K Benkrid, C Hong, A Ebrahim… - ACM Transactions on …, 2015 - dl.acm.org
This article presents a new solution for easing the development of reconfigurable
applications using Field-Programable Gate Arrays (FPGAs). Namely, our Reliable …

The value of FPGAs as reconfigurable hardware enabling Cyber-Physical Systems

T Grimm, B Janßen, O Navarro… - 2015 IEEE 20th …, 2015 - ieeexplore.ieee.org
Industry 4.0 is a reality through the use of intelligent networks capable of gathering and
analyzing data and acting on it autonomously. However, important advancements can be …

FPGA-accelerated analytics: From single nodes to clusters

Z István, K Kara, D Sidler - Foundations and Trends® in …, 2020 - nowpublishers.com
In this monograph, we survey recent research on using reconfigurable hardware
accelerators, namely, Field Programmable Gate Arrays (FPGAs), to accelerate analytical …

The BondMachine, a moldable computer architecture

M Mariotti, D Magalotti, D Spiga, L Storchi - Parallel Computing, 2022 - Elsevier
Future systems will be characterized by the presence of many computing core in a single
device, on large scale data centers or even at the level of IoT devices. The ability to fully …

A software implemented comprehensive soft error detection method for embedded systems

SA Asghari, MB Marvasti, M Daneshtalab - Microprocessors and …, 2020 - Elsevier
This paper presents a comprehensive software-based technique that is capable of detecting
soft errors in embedded systems. Soft errors can be categorized into Control Flow Errors …

Fast online diagnosis and recovery of reconfigurable logic fabrics using design disjunction

A Alzahrani, RF DeMara - IEEE Transactions on Computers, 2016 - ieeexplore.ieee.org
Design disjunction is developed to offer a broad coverage, high resolution, and low
overhead approach to online diagnosis and recovery of reconfigurable fabrics. Design …

Fast search and efficient placement algorithm for reconfigurable tasks on modern heterogeneous fpgas

R Yao, Y Zhao, Y Yu, Y Zhao… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
To date, only a tiny fraction of reconfigurable task placement algorithms is targeted at
modern heterogeneous field-programmable gate array (FPGA) architecture, and they often …