This article presents a time-interleaved (TI) 2nd-order discrete-time (DT) delta-sigma
modulator (DSM). We propose a digital feed-forward extrapolation by first digitizing the …

Asynchronous level crossing ADCs (LC ADC) saves power through non-uniform sampling
making it suitable for wearable devices. This paper presents a review of asynchronous level …

A 2 mW 50 dB-DR 10 MHz-BW bandpass (BP) delta-sigma (ΔΣ) modulator for a digital-IF
receiver is presented. It is based on a power-efficient time-interleaved (TI) architecture …

The nonlinearity of the input sampling switch in a switched-capacitor delta-sigma
(DeltaSigma) analog-to-digital converter (ADC) affects the overall performance of the ADC …

This paper describes issues and tradeoffs related to the design of undersampling delta-
sigma modulators (DeltaSigmaMs) for wireless receivers. It proposes a new bandpass …

In this paper, combined with time-interleaving, noise coupling is used to achieve
considerable improvement in the performance of sigma-delta modulator. Two types of noise …

A parallel multibit continuous-time (CT) ΔΣ analog-to-digital converter for an orthogonal-
frequency-division-multiplexing (OFDM) ultrawideband receiver intended to operate …

This paper presents a new design for the optimization of analog to digital sigma delta-
coupling noise annotations. The proposed technique increases the level of the signal-to …

The settling behavior of two-stage Miller-compensated operational amplifiers (op-amps) is
investigated in this paper. The analysis aims to evaluate the real effectiveness of …

The impact of high-order integrator dynamics on switched-capacitor sigma-delta modulator
(¿¿ M) performances is investigated in this paper. An advanced generic integrator-settling …