A diversity scheme to enhance the reliability of wireless NoC in multipath channel environment

JO Sosa, O Sentieys, C Roland - 2018 Twelfth IEEE/ACM …, 2018 - ieeexplore.ieee.org
Wireless Network-on-Chip (WiNoC) is one of the most promising solutions to overcome multi-
hop latency and high power consumption of modern many/multi core System-on-Chip (SoC) …

Using graphics processors for parallelizing hash-based data carving

C Collange, YS Dandass, M Daumas… - 2009 42nd Hawaii …, 2009 - ieeexplore.ieee.org
The ability to detect fragments of deleted image files and to reconstruct these image files
from all available fragments on disk is a key activity in the field of digital forensics. Although …

HyPPI NoC: Bringing hybrid plasmonics to an opto-electronic network-on-chip

VK Narayana, S Sun, A Mehrabian… - 2017 46th …, 2017 - ieeexplore.ieee.org
As we move towards an era of hundreds of cores, the research community has witnessed
the emergence of optoelectronic network on-chip designs based on nanophotonics, in order …

Adaptive transceiver for wireless NoC to enhance multicast/unicast communication scenarios

JO Sosa, O Sentieys, C Roland - 2019 IEEE Computer Society …, 2019 - ieeexplore.ieee.org
Wireless Network-on-Chip (WiNoC) is a viable solution to overcome critical bottlenecks in on-
chip communication backbone. However, standard WiNoC approaches are vulnerable to …

PHENIC: Silicon photonic 3D-network-on-chip architecture for high-performance heterogeneous many-core system-on-chip

AB Ahmed, AB Abdallah - 14th International Conference on …, 2013 - ieeexplore.ieee.org
Network-on-chip architectures can improve the scalability, performance, and power
efficiency of general multiprocessor systems and application-specific heterogeneous …

Silicon-microring-based thermo-optic non-blocking four-port optical router for optical networks-on-chip

C Li, W Zheng, P Dang, C Zheng, Y Wang… - Optical and Quantum …, 2016 - Springer
By using silicon-on-insulator platform and only four parallel-coupling one microring
resonator routing elements, an active non-blocking four-port optical router was theoretically …

STorus: A new topology for optical network-on-chip

X Li, H Gu, K Chen, L Song, Q Hao - Optical Switching and Networking, 2016 - Elsevier
Abstract Optical Network on Chip (ONoC) architecture is emerging as a promising candidate
in multiprocessor systems-on-chip (MPSoC) because of ultrahigh communication …

[PDF][PDF] ANew INTERCONNECTION TOPOLOGY FOR NETWORK ON CHIP

L Tripathy, CR Tripathy - Int. J. Comput. Netw. Commun.(IJCNC), 2018 - academia.edu
The architecture of networks on chip (NOC) highly affects the overall performance of the
system on chip (SOC). A new topology for chip interconnection called Torus connected …

Low-power low-latency optical network architecture for memory access communication

Y Wang, H Gu, K Wang, Y Yang… - Journal of Optical …, 2016 - opg.optica.org
The interconnection network plays a vital role in improving the performance of modern
computing systems. Traditional electronic interconnect is subject to latency, power …

Design of high-performance, power-efficient optical NoCs using Silica-embedded silicon nanophotonics

E Kakoulli, V Soteriou, C Koutsides… - 2015 33rd IEEE …, 2015 - ieeexplore.ieee.org
With on-chip electrical interconnects being marred by high energy-to-bandwidth costs,
threatening multicore scalability, on-chip nanophotonics, which offer high throughput, yet …