ME Fouda, HE Yantır, AM Eltawil… - IEEE transactions on …, 2022 - ieeexplore.ieee.org
In-memory computing is an emerging computing paradigm that overcomes the limitations of exiting Von-Neumann computing architectures such as the memory-wall bottleneck. In such …
In-memory computing seeks to minimize data movement and alleviate the memory wall by computing in-situ, in the same place that the data is located. One of the key emerging …
The rapid growth of artificial intelligence and the increasing complexity of neural network models are driving demand for efficient hardware architectures that can address power …
The bottleneck between the processor and memory is the most significant barrier to the ongoing development of efficient processing systems. Therefore, a research effort begun to …
M Rakka, R Karami, AM Eltawil, ME Fouda… - arXiv preprint arXiv …, 2024 - arxiv.org
Mixed-precision quantization works Neural Networks (NNs) are gaining traction for their efficient realization on the hardware leading to higher throughput and lower energy. In …
Z Lin, X Zhong, Z Yu, Y Dong, Z Huang, X Gu - Electronics, 2025 - mdpi.com
Flash memory, as the core unit of a compute-in-memory (CIM) array, requires multiple positive and negative (PN) high voltages (HVs) for word lines (WLs) to operate during …
J Wang, S Kim, J Heo, CS Park - 2023 Design, Automation & …, 2023 - ieeexplore.ieee.org
A new system-level simulator, eF 2 lowSim, is proposed to estimate the bit-accurate and cycle-accurate performance of eFlash compute-in-memory (CIM) accelerators for …
X Gu, R Che, Y Dong, Z Yu - Electronics, 2023 - mdpi.com
In floating gate compute-in-memory (CIM) chips, due to the gate equivalent capacitance of the large-scale array and the parasitic capacitance of the long-distance transmission wire, it …
The associative processor (AP) is a processing in-memory (PIM) platform that avoids data movement between the memory and the processor by running computations directly in the …