Comprehensive study of 1-bit full adder cells: review, performance comparison and scalability analysis
Full Adder (FA) circuits are integral components in the design of Arithmetic Logic Units
(ALUs) of modern computing systems. Recently, there have been massive research interests …
(ALUs) of modern computing systems. Recently, there have been massive research interests …
Ultra‐low‐voltage GDI‐based hybrid full adder design for area and energy‐efficient computing systems
K Sanapala, R Sakthivel - IET Circuits, Devices & Systems, 2019 - Wiley Online Library
In recent years, ultra‐low‐voltage (ULV) operation is gaining more importance for achieving
minimum energy consumption. Full adder is the basic computational arithmetic block in …
minimum energy consumption. Full adder is the basic computational arithmetic block in …
Comprehensive analysis of a power-efficient 1-bit hybrid full adder cell
A Kanojia, S Agrawal, R Lorenzo - Wireless Personal Communications, 2023 - Springer
There is an intensive demand for energy-efficient computing gadgets. To optimize the
arithmetic unit of these devices, this paper presents a 1-bit full adder cell designed using a …
arithmetic unit of these devices, this paper presents a 1-bit full adder cell designed using a …
Optimized gate diffusion input method-based reversible magnitude arithmetic unit using non-dominated sorting genetic algorithm II
Gate diffusion input (GDI) method using a simple cell makes it possible to design low-power
logic gates with reduced chip area and less complexity. In this work, a novel design of single …
logic gates with reduced chip area and less complexity. In this work, a novel design of single …
Reversible logic-based magnitude comparator (RMC) circuit using modified-GDI technique for motion detection applications in image processing
Reversible or information lossless gates have applications in nano-technology, digital signal
processing (DSP), communication, computer graphics and cryptography. Gate-diffusion …
processing (DSP), communication, computer graphics and cryptography. Gate-diffusion …
Circuit-level design of radiation tolerant memory cell
M Pandey, A Islam - AEU-International Journal of Electronics and …, 2024 - Elsevier
As transistors shrink in size, the integration density of memory circuits like Static Random
Access Memory (SRAM) cells rises, making them increasingly susceptible to Single Event …
Access Memory (SRAM) cells rises, making them increasingly susceptible to Single Event …
IoT-based smart wearable devices using very large scale integration (VLSI) technology
People's usage of smart wearable devices and sensors plays a crucial role in VLSI
technology. The wearable devices are embedded in clothes, smartwatches, and …
technology. The wearable devices are embedded in clothes, smartwatches, and …
A novel modified GDI method-based clocked M/S-TFF for future generation microprocessor chips in nano schemes
In this work, a novel architecture is proposed for designing the clocked master-slave TFF
(M/S-TFF) based on modified gate-diffusion input (m-GDI) method. By noting that we used …
(M/S-TFF) based on modified gate-diffusion input (m-GDI) method. By noting that we used …
Performance Analysis of full adder circuit using Conventional and Hybrid Techniques
D Vaithiyanathan, SM Sonar, JB Parri… - 2021 IEEE Madras …, 2021 - ieeexplore.ieee.org
Adders are widely used in many digital circuits and play an integral role in the
implementation of various logic circuits. From the starting days, efforts are being made to …
implementation of various logic circuits. From the starting days, efforts are being made to …
Performance Efficient and Fault Tolerant Approximate Adder
Fault tolerant adders are an important design paradigm to improve the robustness of the
adder while at the same time improving the yield. The major downside of fault tolerant …
adder while at the same time improving the yield. The major downside of fault tolerant …