In this work, we utilize a figure-of-merit (FOM) to compare the performance of various phase- change materials (PCMs) in managing short bursts of high-power heat flux, particularly …
S Fan, SM Zahedi, BC Lee - ACM SIGARCH Computer Architecture …, 2016 - dl.acm.org
Computational sprinting is a class of mechanisms that boost performance but dissipate additional power. We describe a sprinting architecture in which many, independent chip …
W Godycki, C Torng, I Bukreyev… - 2014 47th Annual …, 2014 - ieeexplore.ieee.org
Recent work has shown that monolithic integration of voltage regulators will be feasible in the near future, enabling reduced system cost and the potential for fine-grain voltage scaling …
Datacenters, or warehouse scale computers, are rapidly increasing in size and power consumption. However, this growth comes at the cost of an increasing thermal load that must …
Dark Silicon denotes the phenomenon that, due to thermal and power constraints, the fraction of transistors that can operate at full frequency is decreasing with each technology …
Computational sprinting has been proposed to improve responsiveness for the intermittent computational demands of many current and emerging mobile applications by briefly …
A Antoniadis, CC Huang, S Ott - Proceedings of the twenty-sixth annual ACM …, 2014 - SIAM
We study classical deadline-based preemptive scheduling of jobs in a computing environment equipped with both dynamic speed scaling and sleep state capabilities: Each …
In the dark silicon era, a fundamental problem is given a real-time computation demand, how to determine if an on-chip multiprocessor system is able to accept this demand and to …
Future many-core systems need to handle high power density and chip temperature effectively. Some cores in many-core systems need to be turned off or 'dark'to manage chip …