A 40 Gs/s time interleaved ADC using SiGe BiCMOS technology

M Chu, P Jacob, JW Kim, MR LeRoy… - IEEE Journal of Solid …, 2010 - ieeexplore.ieee.org
The search for high speed, high bandwidth A/D converters is ongoing, and techniques to
push the envelope are constantly being developed. In this paper an open loop, scalable …

An 8-bit, 12 GSample/sec SiGe track-and-hold amplifier

Y Lu, WML Kuo, X Li, R Krithivasan… - Proceedings of the …, 2005 - ieeexplore.ieee.org
We present the design and implementation of an ultra-high-speed SiGe BiCMOS track-and-
hold amplifier (THA) for use in high-speed analog-to-digital converters. The use of a …

A 40 GS/s SiGe track-and-hold amplifier

X Li, WML Kuo, JD Cressler - 2008 IEEE Bipolar/BiCMOS …, 2008 - ieeexplore.ieee.org
An ultra-high-speed SiGe track-and-hold amplifier (THA) using a switched-emitter-follower
(SEF) configuration is presented. Operating off a+ 5.5 V power supply, this THA exhibits-32.4 …

A 5-bit, 18 GS/sec SiGe HBT track-and-hold amplifier

X Li, WL Kuo, Y Lu, R Krithivasan… - … , 2005. CSIC'05., 2005 - ieeexplore.ieee.org
An ultra-high-speed track-and-hold amplifier (THA) using a switched-emitter-follower (SEF)
configuration is presented. Implemented in a commercially-available 0.18/spl mu/m 120 GHz …

A low-power, 10GS/s track-and-hold amplifier in SiGe BiCMOS technology

Y Borokhovych, H Gustat, B Tillack… - Proceedings of the …, 2005 - ieeexplore.ieee.org
This paper presents a low-power high-speed BiCMOS track-and-hold amplifier (THA). It
combines the differential switched-emitter follower of (Vorenkamp and Verdaasdonk, 1992) …

A 1-gsample/s, 15-GHz input bandwidth master–slave track-and-hold amplifier in inp dhbt technology

Y Bouvier, A Ouslimani… - IEEE transactions on …, 2009 - ieeexplore.ieee.org
A fully differential master-slave track-and-hold amplifier is designed and fabricated in a 210-
GHz-f T InP DHBT process. Input bandwidth of 15 GHz, total harmonic distortion lower than …

Low‐power sample and hold circuits using current conveyor analogue switches

M Kumngern, T Nonthaputha… - IET Circuits, Devices & …, 2018 - Wiley Online Library
This study presents low‐power sample and hold (S/H) circuits using second‐generation
current conveyor (CCII). Unlike previous S/H circuits, switch of the proposed S/H circuits can …

A single-channel 10b 1GS/s ADC with 1-cycle latency using pipelined cascaded folding

A Razzaghi, SW Tam, P Kalkhoran… - 2008 IEEE Bipolar …, 2008 - ieeexplore.ieee.org
A 10b 1GS/s ADC employing a single channel cascaded folding architecture is presented.
Conversion speed of 1GS/s is attained by incorporating low-power distributed track-and …

An 8 bit 10 GS/s 2Vpp track and hold amplifier in SiGe BiCMOS technology

S Halder, H Gustat, C Scheytt - 2006 Proceedings of the 32nd …, 2006 - ieeexplore.ieee.org
This paper presents a track and hold amplifier (THA) in 0.25 mum BiCMOS technology. By
using a cascode amplifier as input stage, we enhance the linearity of the THA input buffer for …

A 20-GSamples/s track-hold amplifier in InP DHBT technology

Y Bouvier, A Konczykowska… - 2007 European …, 2007 - ieeexplore.ieee.org
A fully differential 20 Gsample/s Track and Hold Amplifier with 20 GHz large-input-signal
bandwidth is designed and fabricated in 210 GHz-fT-InP-DHBT on a 1.6 x 1.4 mm 2 chip …