Processor-based strong physical unclonable functions with aging-based response tuning
J Kong, F Koushanfar - IEEE Transactions on Emerging Topics …, 2013 - ieeexplore.ieee.org
A strong physically unclonable function (PUF) is a circuit structure that extracts an
exponential number of unique chip signatures from a bounded number of circuit …
exponential number of unique chip signatures from a bounded number of circuit …
An energy-efficient last-level cache architecture for process variation-tolerant 3D microprocessors
As process technologies evolves, tackling process variation problems is becoming more
challenging in 3D (ie, die-stacked) microprocessors. Process variation adversely affects …
challenging in 3D (ie, die-stacked) microprocessors. Process variation adversely affects …
Exploiting narrow-width values for process variation-tolerant 3-D microprocessors
Process variation is a challenging problem in 3D microprocessors, since it adversely affects
performance, power, and reliability of 3D microprocessors, which in turn results in yield …
performance, power, and reliability of 3D microprocessors, which in turn results in yield …
Fine-grained voltage boosting for improving yield in near-threshold many-core processors
Process variation is a major impediment in optimizing yield, energy, and performance in
near-threshold many-core processors. In this paper, we present a comprehensive analysis …
near-threshold many-core processors. In this paper, we present a comprehensive analysis …
Variable latency L1 data cache architecture design in multi-core processor under process variation
J Kong - Journal of The Korea Society of Computer and …, 2015 - koreascience.kr
In this paper, we propose a new variable latency L1 data cache architecture for multi-core
processors. Our proposed architecture extends the traditional variable latency cache to be …
processors. Our proposed architecture extends the traditional variable latency cache to be …
Near-threshold L1 data cache for yield management under process variations
Near-threshold computing (NTC) has recently emerged and been considered as a strong
candidate for future energy-efficient computing. However, adverse impacts from process …
candidate for future energy-efficient computing. However, adverse impacts from process …
An efficient trade-off between yield and energy for eDRAM caches under process variations
Abstract eDRAM cells have been considered as a promising alternative to conventional
SRAM cells and already adopted in commercial processors. However, eDRAM cells need to …
SRAM cells and already adopted in commercial processors. However, eDRAM cells need to …
Process variation-tolerant 3D microprocessor design: An efficient architectural solution
Process variation is one of the most challenging problems for 3D microprocessors. This is
because stacked dies are likely to have fairly different characteristics due to wafer-to-wafer …
because stacked dies are likely to have fairly different characteristics due to wafer-to-wafer …