One-IPC high-level simulation of microthreaded many-core architectures

I Uddin - The International Journal of High Performance …, 2017 - journals.sagepub.com
The microthreaded many-core architecture is comprised of multiple clusters of fine-grained
multi-threaded cores. The management of concurrency is supported in the instruction set …

High-level simulation of concurrency operations in microthreaded many-core architectures

I Uddin - GSTF Journal on Computing (JoC), 2015 - Springer
Computer architects are always interested in analyzing the complex interactions amongst
the dynamically allocated resources. Generally a detailed simulator with a cycle-accurate …

[HTML][HTML] Multiple levels of abstraction in the simulation of microthreaded many-core architectures

I Uddin - Open Journal of Modelling and Simulation, 2015 - scirp.org
Simulators are generally used during the design of computer architectures. Typically,
different simulators with different levels of complexity, speed and accuracy are used …

Matching content-based saliency regions for partial-duplicate image retrieval

L Li, Z Wu, ZJ Zha, S Jiang… - 2011 IEEE International …, 2011 - ieeexplore.ieee.org
In traditional partial-duplicate image retrieval, images are commonly represented using the
Bag-of-Visual-Words (BOV) model built from image local features, such as SIFT. Actually …

Cache-based high-level simulation of microthreaded many-core architectures

I Uddin, R Poss, C Jesshope - Journal of Systems Architecture, 2014 - Elsevier
The accuracy of simulated cycles in high-level simulators is generally less than the accuracy
in detailed simulators for a single-core systems, because high-level simulators simulate the …

Analytical-based high-level simulation of the microthreaded many-core architectures

I Uddin, R Poss, C Jesshope - 2014 22nd Euromicro …, 2014 - ieeexplore.ieee.org
High-level simulation is becoming commonly used for design space exploration of many-
core systems. We have been working on high-level simulation techniques for the …

Signature-based high-level simulation of microthreaded many-core architectures

I Uddin, R Poss, C Jesshope - 2014 4th International …, 2014 - ieeexplore.ieee.org
The simulation of fine-grained latency tolerance based on the dynamic state of the system in
high-level simulation of many-core systems is a challenging simulation problem. We have …

SL: a" quick and dirty" but working intermediate language for SVP systems

R Poss - arXiv preprint arXiv:1208.4572, 2012 - arxiv.org
The CSA group at the University of Amsterdam has developed SVP, a framework to manage
and program many-core and hardware multithreaded processors. In this article, we …

Design space exploration in the microthreaded many-core architecture

I Uddin - arXiv preprint arXiv:1309.5551, 2013 - arxiv.org
Design space exploration is commonly performed in embedded system, where the
architecture is a complicated piece of engineering. With the current trend of many-core …

Advances in computer architecture

I Uddin - arXiv preprint arXiv:1309.5459, 2013 - arxiv.org
In the past, efforts were taken to improve the performance of a processor via frequency
scaling. However, industry has reached the limits of increasing the frequency and therefore …