Limits on fundamental limits to computation

IL Markov - Nature, 2014 - nature.com
An indispensable part of our personal and working lives, computing has also become
essential to industries and governments. Steady improvements in computer hardware have …

Hardware security for and beyond CMOS technology: an overview on fundamentals, applications, and challenges

J Knechtel - Proceedings of the 2020 International Symposium on …, 2020 - dl.acm.org
As with most aspects of electronic systems and integrated circuits, hardware security has
traditionally evolved around the dominant CMOS technology. However, with the rise of …

Obfuscating the interconnects: Low-cost and resilient full-chip layout camouflaging

S Patnaik, M Ashraf, O Sinanoglu… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
Layout camouflaging can protect the intellectual property of modern circuits. Most prior art,
however, incurs excessive layout overheads and necessitates customization of active …

Hardware security for and beyond CMOS technology

J Knechtel - Proceedings of the 2021 International Symposium on …, 2021 - dl.acm.org
As with most aspects of electronic systems and integrated circuits, hardware security has
traditionally evolved around the dominant CMOS technology. However, with the rise of …

Accuracy-based hybrid parasitic capacitance extraction using rule-based, neural-networks, and field-solver methods

MS Abouelyazid, S Hammouda… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
As process technologies scale down, the accuracy requirements of parasitic capacitance
extractions for integrated circuits significantly increase. This work introduces a novel …

[HTML][HTML] Guest Editorial: Dimensional Scaling of Material Functional Properties to Meet Back-End-of-Line (BEOL) Challenges

S Rakheja, Z Chen, CT Chen - Applied Physics Letters, 2023 - pubs.aip.org
The discovery and design of novel materials with desired properties, as well as the
development of functional devices that harness new physics originating in these materials …

Electrical-spin transduction for CMOS-spintronic interface and long-range interconnects

RM Iraei, S Manipatruni, DE Nikonov… - IEEE Journal on …, 2017 - ieeexplore.ieee.org
We propose circuits for efficient transduction between electrical and spin signals and
compare designs for long-range spintronic interconnects based on transducers and …

Metal-metal contact resistance measurements

P Shen, D Gall - 2024 IEEE International Interconnect …, 2024 - ieeexplore.ieee.org
The contact resistance at metal-metal (W, Mo, Ru, Co, TiN) interfaces is determined using a
new method based on blanket superlattice thin films where the resistivity ρ parallel to the …

Clocked magnetostriction-assisted spintronic device design and simulation

RM Iraei, N Kani, S Dutta, DE Nikonov… - … on Electron Devices, 2018 - ieeexplore.ieee.org
We propose a heterostructure device comprised of magnets and piezoelectrics, which
significantly improves the delay and the energy dissipation of an all-spin logic (ASL) device …

Integrated Circuits Parasitic Capacitance Extraction Using Machine Learning and its Application to Layout Optimization

MSA Saleh - 2022 - fount.aucegypt.edu
The impact of parasitic elements on the overall circuit performance keeps increasing from
one technology generation to the next. In advanced process nodes, the parasitic effects …