Method of wire bonding over active area of a semiconductor circuit

JY Lee, YC Chen - US Patent 8,021,976, 2011 - Google Patents
US8021976B2 - Method of wire bonding over active area of a semiconductor circuit -
Google Patents US8021976B2 - Method of wire bonding over active area of a …

Method and system for batch manufacturing of spring elements

DD Brown, JD Williams, WB Long, T Chen - US Patent 7,758,351, 2010 - Google Patents
A system for batch forming a sheet of spring elements in three dimensions is described. A
spring element sheet containing spring elements defined in two dimensions is arranged …

Structure and process for a contact grid array formed in a circuitized substrate

DD Brown, JD Williams, WB Long - US Patent 7,628,617, 2009 - Google Patents
An elastic contact array circuitized substrate includes a circuitized substrate provided with
circuit traces, and an array of three dimensional contact elements joined to the circuitized …

Land grid array connector including heterogeneous contact elements

DD Brown, JD Williams, H Yao - US Patent 7,070,419, 2006 - Google Patents
An electrical connector for electrically connecting to pads of a land grid array formed on an
electronic component includes a dielectric layer including opposing first and second …

Method and system for batch forming spring elements in three dimensions

EM Radza, JD Williams - US Patent 7,597,561, 2009 - Google Patents
(57) ABSTRACT A system for batch forming a sheet of spring elements in three dimensions
includes a top spacer layer. A plurality of ball bearings is arranged in a predetermined …

Method for fabricating a connector

LE Dittmann - US Patent 7,383,632, 2008 - Google Patents
A method for fabricating an electrical connector made up of an array of metallic contacts that
act as conductive carriers, each attached to a flexible insulating sheet in one of an array of …

Multiple chips bonded to packaging structure with low noise and multiple selectable functions

MS Lin, B Peng - US Patent 8,148,806, 2012 - Google Patents
The package includes a Substrate, a first chip, a second chip, multiple first bumps and
multiple second bumps. The sub strate has a first region and a second region. The first …

Electrical connector and method of making it

DN Light, DS Kalakkad, PT Nguyen - US Patent 8,641,428, 2014 - Google Patents
N the filled vias includes the steps of plating the vias with an electrically-conductive material
to create an electrically-con ductive path between portions of the substrate and compo nents …

Circuitry component and method for forming the same

MS Lin, CK Chou, KH Chen - US Patent 8,884,433, 2014 - Google Patents
H01L 29/40(200601) A olrcult structure 1ncludes a semlconductor substrate,? rst H01L
23/532(200601) and second metallic posts over the semiconductor substrate, H01L …

Electrical connector with electrical contacts protected by a layer of compressible material and method of making it

DN Light, HM Wang, DR Baker, PT Nguyen… - US Patent …, 2017 - Google Patents
Disclosed is an electrical connector having a Substrate and movable electrical contacts
which are mounted to the sub strate and extend a distance D from the substrate. A layer of …