Through silicon via (TSV)-based 3-D integrated circuit has introduced the solution to
limitlessly growing demand on high system bandwidth, low power consumption, and small …

Clock network synthesis is one of the most important and challenging problems in 3-D ICs.
The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with …

Current research on the transmission characteristics of through silicon via-redistribution
layer (TSV-RDL) interconnects is basically limited to the single-pair interconnect (a device …

Through silicon vias (TSVs) are a critical technology for manufacturing three-dimensional
stacked structure of semiconductor packages by forming holes that penetrate silicon wafers …

The faults in through-silicon via (TSV) have a critical impact on the reliability and yield of a
threedimensional integrated circuit (3-D IC). With the significant increase in the number of …

A lumped analytical electrical model for cracked (open fault) TSVs is proposed in this paper.
Accurate and reliable fault models can support the test methods for the possible defects and …

The Wide bandwidth and smaller form factor, high-speed TSV I/O channel design in three-
dimensional integrated circuit (3D IC) becomes a trend with the unremittingly evolving …

In the non-ideal manufacturing process of Through Silicon Vias (TSV), many factors
including nonuniform filling, not completely chemical mechanical polishing, tilted vias will …

Within this paper, four different pitches of Through Silicon Via (TSV) of single-ended ground-
signal-ground (GSG) signaling configuration with redistribution layer (RDL) and testing pad …

In this paper, the characterization of silicon substrate is investigated based on related
frequency-dependent parameters induced by the TSV as well as the silicon substrate. It is …