Dual loop digital low drop regulator and current sharing control apparatus for distributable voltage regulators

YC Shih, K Mazumdar, ST Kim, R Jain… - US Patent …, 2020 - Google Patents
Described is an apparatus which comprises: a plurality of transistors coupled to an input
power supply and to a load; a first comparator with a first node coupled to the load, and a …

Power supply glitch attacks: Design and evaluation of detection circuits

K Gomina, JB Rigaud, P Gendrier… - … Security and Trust …, 2014 - ieeexplore.ieee.org
Techniques using modification of power supplies to attack circuits do not require strong
expertise or expensive equipment. Supply voltage glitches are then a serious threat to the …

Tunable sensors for process-aware voltage scaling

TB Chan, AB Kahng - Proceedings of the International Conference on …, 2012 - dl.acm.org
VLSI circuits usually allocate excess margin to account for worst-case process variation.
Since most chips are fabricated at process conditions better than the worst-case corner …

Optimal selection of SRAM bit-cell size for power reduction in video compression

H Kim, IJ Chang, HJ Lee - … on Emerging and Selected Topics in …, 2018 - ieeexplore.ieee.org
In mobile multimedia devices with video compression capability, a large amount of power
consumption is incurred by storing video data in static random-access memories (SRAMs) …

Peak detector circuits for safeguarding against fault injection attacks

S Kaur, S Sharma, M Parmar, L Gupta - International Conference on IoT …, 2023 - Springer
Rate of diversification and evolution among various embedded and IOT devices have made
them easily susceptible to new kinds of attacks known as hardware attacks. Physical …

Silicon based security for protection against hardware vulnerabilities

S Kaur, B Singh, H Kaur - Silicon, 2021 - Springer
Silicon based embedded devices are susceptible to hardware attacks viz.: side channel
attacks and fault injection attacks. Fault injection attack is an emerging field affecting security …

A statistic-based scan chain reordering for energy-quality scalable scan test

S Seo, K Cho, YW Lee, S Kang - IEEE Journal on Emerging …, 2018 - ieeexplore.ieee.org
As a rapid progress in technology processes, the design integration of high-performance
system-on-chip (SoC) is on the rise rapidly. To incorporate hundreds of IP cores into a single …

80μW/MHz 0.68 V Ultra Low-Power Variation-Tolerant Superscalar Dual-Core Application Processor

Y Kwon, JJ Lee, KS Shin, JH Han… - IEIE Transactions on …, 2015 - koreascience.kr
Upcoming ground-breaking applications for always-on tiny interconnected devices steadily
demand two-fold features of processor cores: aggressively low power consumption and …

The role of adaptation and resiliency in computation and power management: Special session paper

A Raychowdhury, SB Nasir… - 2014 IEEE/ACM …, 2014 - ieeexplore.ieee.org
This article provides an overview of adaptation and resiliency as design parameters in
energy efficient systems. By allowing embedded sensor based adaptation in logic, memory …

Dual loop digital low drop regulator and current sharing control apparatus for distributable voltage regulators

YC Shih, K Mazumdar, ST Kim, R Jain… - US Patent …, 2024 - Google Patents
Described is an apparatus which comprises: a plurality of transistors coupled to an input
power supply and to a load; a first comparator with a first node coupled to the load, and a …