Next-generation delta-sigma converters: Trends and perspectives
JM de la Rosa, R Schreier, KP Pun… - IEEE Journal on …, 2015 - ieeexplore.ieee.org
This paper presents an overview of emerging circuits and systems techniques which are at
the forefront of the state of the art in ΔΣ modulators, pushing their performance forward and …
the forefront of the state of the art in ΔΣ modulators, pushing their performance forward and …
Temporal-coded deep spiking neural network with easy training and robust performance
Spiking neural network (SNN) is promising but the development has fallen far behind
conventional deep neural networks (DNNs) because of difficult training. To resolve the …
conventional deep neural networks (DNNs) because of difficult training. To resolve the …
A±50-mV linear-input-range VCO-based neural-recording front-end with digital nonlinearity correction
Closed-loop neuromodulation is an essential function in future neural implants for delivering
efficient and effective therapy. However, a closed-loop system requires the neural-recording …
efficient and effective therapy. However, a closed-loop system requires the neural-recording …
A non-interleaved 12-b 330-MS/s pipelined-SAR ADC with PVT-stabilized dynamic amplifier achieving sub-1-dB SNDR variation
H Huang, H Xu, B Elies, Y Chiu - IEEE Journal of Solid-State …, 2017 - ieeexplore.ieee.org
A process, voltage, and temperature (PVT)-stabilized dynamic amplification technique is
reported for the pipelined-successive-approximation-register (SAR) analog-to-digital …
reported for the pipelined-successive-approximation-register (SAR) analog-to-digital …
A Scaling-Friendly Low-Power Small-Area ADC With VCO-Based Integrator and Intrinsic Mismatch Shaping Capability
This paper presents a first-order scaling-friendly VCO-based closed-loop ΔΣ ADC. It uses
the VCO as both quantizer and integrator, and thus, obviates the need for power-hungry …
the VCO as both quantizer and integrator, and thus, obviates the need for power-hungry …
An Energy-Efficient Hybrid SAR-VCO Capacitance-to-Digital Converter in 40-nm CMOS
This paper presents a highly digital, 0-1 MASH capacitance-to-digital converter (CDC). The
CDC works by sampling a reference voltage on the sensing capacitor and then quantizing …
CDC works by sampling a reference voltage on the sensing capacitor and then quantizing …
A noise-shaped VCO-based nonuniform sampling ADC with phase-domain level crossing
TF Wu, MSW Chen - IEEE Journal of Solid-State Circuits, 2019 - ieeexplore.ieee.org
This paper introduces a voltage-controlled oscillator (VCO)-based nonuniform sampling
(NUS) analog-to-digital converter (ADC), which shifts the conventional voltage-domain level …
(NUS) analog-to-digital converter (ADC), which shifts the conventional voltage-domain level …
A 10-Bit 5 MS/s VCO-SAR ADC in 0.18- m CMOS
This brief presents a 10-bit 5 MS/s hybrid analog-to-digital converter (ADC) combining
successive approximation register (SAR) with voltage-controlled oscillator (VCO) in 0.18-μm …
successive approximation register (SAR) with voltage-controlled oscillator (VCO) in 0.18-μm …
A 1.2-GS/s 8-bit two-step SAR ADC in 65-nm CMOS with passive residue transfer
H Huang, L Du, Y Chiu - IEEE Journal of Solid-State Circuits, 2017 - ieeexplore.ieee.org
A high-speed 2b-1b/cycle two-step successive-approximation-register analog-to-digital
converter (ADC) exploiting the passive residue transfer technique is reported. The removal …
converter (ADC) exploiting the passive residue transfer technique is reported. The removal …
A 12-b ENOB 2.5-MHz BW VCO-based 0-1 MASH ADC with direct digital background calibration
This paper presents a scaling friendly mostly digital voltage-controlled-oscillator (VCO)-
based 0-1 multistage noise shaping (MASH) analog-to-digital converter. A novel …
based 0-1 multistage noise shaping (MASH) analog-to-digital converter. A novel …