FU Rahman, J Shin - US Patent App. 18/582,728, 2024 - Google Patents
An integrated circuit (IC) features a delay-locked loop (DLL) with a DLL signal input. The DLL comprises a delay line with multiple delay stages, a gater with clock input, and a phase …
FU Rahman, J Shin - US Patent 11,916,559, 2024 - Google Patents
A DLL includes a delay line with two phase outputs, a gater coupled with the delay line phase outputs, a PFD coupled with gater outputs, a PD coupled with PFD outputs, a retimer …