Estimation of common-mode current coupled to the communication cable in a motor drive system

H Chen, T Wang - IEEE Transactions on Electromagnetic …, 2018 - ieeexplore.ieee.org
Electromagnetic interference (EMI) couplings between a motor drive and an adjacent
communication network induce a considerable common-mode (CM) current in a …

Efficient jitter analysis for a chain of CMOS inverters

JN Tripathi, P Arora, H Shrimali… - IEEE Transactions on …, 2018 - ieeexplore.ieee.org
This paper presents an efficient method to estimate jitter in a chain of CMOS inverters in the
presence of multiple noise sources, including the power supply noise, input data noise, and …

An IBIS-like modelling for power/ground noise induced jitter under simultaneous switching outputs (SSO)

M Souilem, JN Tripathi, W Dghais… - 2019 IEEE 23rd …, 2019 - ieeexplore.ieee.org
This paper presents an assessment of jitter induced by power and ground (P/G) voltage
variations. The assessment is based on an extended input/output buffer information …

Modeling, Analyzing and Suppression of EMI Effects in Eddy Current Sensors of Active Magnetic Bearings

Y Xie, D Jiang, J Ding, Z Liu - IEEE Transactions on Power …, 2025 - ieeexplore.ieee.org
The displacement sensor is of vital importance for the levitation control of the active
magnetic bearing (AMB). For the most widely used eddy current sensor (ECS), it is easy to …

A new methodology to build the internal activity block of ICEM-CE for complex integrated circuits

C Ghfiri, A Boyer, A Durier… - IEEE transactions on …, 2017 - ieeexplore.ieee.org
End-users of integrated circuits need models to anticipate and solve conducted emission
issues at board level in a short time. The standard IEC62433-2 integrated circuit emission …

Meander-DGS Effect on Electromagnetic Bandgap Structure for Power/Ground Noise Suppression in High-Speed Integrated Circuit Packages and PCBs

M Kim - Electronics, 2022 - mdpi.com
In this paper, we present the impact of a meander-shaped defected ground structure
(MDGS) on the slow-wave characteristics of a lowest-order passband and a low cutoff …

A new clock phase calibration method in high-speed and high-resolution DACs

C Zhu, J Lin, Z Wang - … Transactions on Circuits and Systems II …, 2018 - ieeexplore.ieee.org
Current steering digital-to-analog converters (DACs) are well suited for high-resolution, high-
speed applications. A serious design challenge is brought by the requirement of solving the …

Analysis of nonlinear power distribution network and estimation of jitter transfer functions based on output buffer pseudo open drain termination

Y Liu, Y Yan, X Chu, Y Li - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
With increasing data rates of links, jitter budget allowable for the channel keeps decreasing,
and precisely estimating jitter becomes very important to have confidence in designing a …

Analytical Modeling of Ground Noise Induced Jitter in CMOS Inverters

VK Verma, JN Tripathi - 2022 IEEE 19th India Council …, 2022 - ieeexplore.ieee.org
This study proposes an analytical method for estimating jitter in CMOS inverters due to the
ground noise (ground-bounce noise). The equations for modeling the transition edge of …

A hybrid method for signal integrity analysis of traces and vias in an infinitely large plate pair

L Ren, P Shao, K Qiu, J Lim, R Brooks… - IEEE Transactions …, 2015 - ieeexplore.ieee.org
A hybrid approach is proposed to signal integrity analysis of trace and vias in plate pair with
an infinitely large dimension. By using the domain decomposition method, trace domain and …