A scalable heterogeneous multi-core processor is developed. 3D heterogeneous chip
stacking of a general-purpose CPU and reconfigurable multi-core accelerators improves …

This paper proposes an ultra fine-grained run-time power gating of on-chip router, in which
power supply to each router component (eg, VC queue, crossbar MUX, and output latch) can …

The authors developed a scalable heterogeneous multicore processor. 3D heterogeneous
chip stacking of a general-purpose CPU and reconfigurable multicore accelerators enables …

We introduce and experimentally validate a new macro-level model of the CPU
temperature/power relationship within nanometer-scale application processors or system-on …

This paper proposes the ultrafine-grained run-time power gating of on-chip routers, in which
the power supply to each router component (eg, virtual-channel buffer, virtual-channel …

Power-performance efficiency is still remaining a primary concern for microprocessor
designers. One of the sources of power inefficiency for recent LSI chips is increasing …

Aiming at the stochastic vehicle routing problems with uncertain demand and travel time and
with simultaneous pickups and deliveries, a stochastic programming model is formulated …

A method of absolute value estimation of the computer energy consumption in performing
the programs is proposed in the chapter. The evaluation is made on the basis of the program …

When a moving robot tries to find text in the surrounding scene by an onboard video camera,
the same text strings appear in many image frames. Since it is a waste of time to recognize …

In a fine-grain leakage saving technique to power gate function units, the efficiency is
sensitive to overhead energy dissipating at turning on/off power switches. To get gain in …