Meta-heuristics: The state of the art

S Voß - Workshop on Local Search for Planning and …, 2000 - Springer
Meta-heuristics support managers in decision-making with robust tools that provide high-
quality solutions to important applications in business, engineering, economics and science …

Performance optimization of VLSI interconnect layout

J Cong, L He, CK Koh, PH Madden - Integration, 1996 - Elsevier
This paper presents a comprehensive survey of existing techniques for interconnect
optimization during the VLSI physical design process, with emphasis on recent studies on …

[图书][B] Handbook of approximation algorithms and metaheuristics

TF Gonzalez - 2007 - taylorfrancis.com
Delineating the tremendous growth in this area, the Handbook of Approximation Algorithms
and Metaheuristics covers fundamental, theoretical topics as well as advanced, practical …

[PDF][PDF] Improved steiner tree approximation in graphs.

G Robins, A Zelikovsky - SODA, 2000 - researchgate.net
Improved Steiner Tree Approximation in Graphs 1 Introduction Page 1 Improved Steiner Tree
Approximation in Graphs Gabriel Robins Alexander Zelikovskyy Abstract The Steiner tree …

[图书][B] VLSI physical design automation: theory and practice

SM Sait, H Youssef - 1999 - books.google.com
VLSI is an important area of electronic and computer engineering. However, there are few
textbooks available for undergraduate/postgraduate study of VLSI design automation and …

Tighter bounds for graph Steiner tree approximation

G Robins, A Zelikovsky - SIAM Journal on Discrete Mathematics, 2005 - SIAM
The classical Steiner tree problem in weighted graphs seeks a minimum weight connected
subgraph containing a given subset of the vertices (terminals). We present a new polynomial …

[图书][B] Opportunities and limitations of three-dimensional integration for interconnect design

JW Joyner - 2003 - search.proquest.com
The re-emerging interconnect problem is quickly becoming a major bottleneck to the
performance enhancement and cost reduction of modern digital systems. To overcome this …

[PDF][PDF] Performance-driven interconnect design based on distributed RC delay model

J Cong, KS Leung, D Zhou - … of the 30th International Design Automation …, 1993 - dl.acm.org
In this paper, we study the interconnect design problem under a distributed RC delay model.
We study the impact of technology factors on the interconnect designs and present general …

An edge-based heuristic for Steiner routing

M Borah, RM Owens, MJ Irwin - IEEE Transactions on …, 1994 - ieeexplore.ieee.org
A new approximation heuristic for finding a rectilinear Steiner tree of a set of nodes is
presented. It starts with a rectilinear minimum spanning tree of the nodes and repeatedly …

Bounded-skew clock and Steiner routing

J Cong, AB Kahng, CK Koh, CWA Tsao - ACM Transactions on Design …, 1998 - dl.acm.org
We study the minimum-cost bounded-skew routing tree problem under the pathlength
(linear) and Elmore delay models. This problem captures several engineering tradeoffs in …