Devices for using a neural network to choose an optimal error correction algorithm are
disclosed. An example device includes a decoding controller inputting at least one of the …

A memory system, a bit-flipping (BF) low-density parity check (LDPC) decoder included in
the memory system and operating methods thereof in which such decoder or decoding has …

Disclosed herein is a neural network based pre-decoder comprising a permutation
embedding engine, a permutation classifier each comprising one or more trained neural …

Examples described herein utilize multi-layer neural networks to decode encoded data (eg,
data encoded using one or more encoding techniques). The neural networks have nonlinear …

Methods and apparatus for training a neural network to recover a codeword and for
decoding a received signal using a neural network are disclosed. According to examples of …

An illustrative embodiment of this disclosure is an apparatus, including a memory, a
processor in communication with the memory, and a decoder. The processor is configured to …

Methods and apparatus for training a Neural Network to recover a codeword of a Forward
Error Correction (FEC) code are provided. Trainable parameters of the Neural Network are …

Techniques related to improving the decoding performance of codewords, such as LDPC
codewords, are described. In an example, the error-correction capability of a decoding layer …

A machine-learning (ML) error-correcting code (ECC) controller may include a hard-decision
(HD) ECC decoder optimized for high-speed data throughput, a soft-decision (SD) ECC …

Examples described herein relate generally to content aware bit flipping decoders. An
example device includes a decoder. The decoder is configured to: process one or more flip …