Sensor based posture detection system

KN Devi, J Anand, R Kothai, JMA Krishna… - Materials Today …, 2022 - Elsevier
Posture identification system has been extensively useful in areas such as physical
activities, ecological awareness events, man machine interfacing applications, control room …

Electronic Computer-Aided Design for Low-Level Modeling of Networks-on-Chip

EV Lezhnev, VV Zunin, AA Amerikanov… - IEEE …, 2024 - ieeexplore.ieee.org
This article proposes a Network-on-Chip (NoC) communication subsystem model on the
basis of which the Electronic Computer-Aided Design (ECAD) architecture in the form of …

Emerging trends in network on chip design for low latency and enhanced throughput applications

A Mulajkar, SK Sinha, GS Patel - AIP Conference Proceedings, 2023 - pubs.aip.org
Traditionally Bus is used as an interconnection mechanism in many embedded systems.
The Bus often fails to accommodate the communication needs of such systems, as the need …

Design of double edge-triggered flip-flop for low-power educational environment

L Punitha, KN Devi, D Jose… - International Journal of …, 2023 - journals.sagepub.com
Power consumption plays a significant role in any integrated circuit. In this study, an explicit
type pulse trigger flip-flop is implemented using the CMOS 90 nm technology. For low-power …

Online multi-job mapping for photonic network on a chip design using partial migrations

M Rafie, A Reza - Cluster Computing, 2021 - Springer
In this paper, we propose a chain of online multi-job mapping for Photonic Network-on-Chip
(PNoC) design to increase bandwidth and decrease power consumption for overcoming the …

Design of Priority Based Low Power Reconfigurable Router in Network on Chip

DNP Devadhas - Informacije MIDEM, 2019 - ojs.midem-drustvo.si
Abstract Network on Chip (NoC) is an advanced integration design for communication
networks and used as modules in System on Chip (SoC) designs. It provides the solution to …