Embedded digital devices, such as Field-Programmable Gate Arrays (FPGAs) and Systems
on Chip (SoCs), are increasingly used in dependable or safety-critical systems. These …

We have investigated the stability of the gate stack of GaN n-MOSFETs under positive gate
stress. Devices with a gate dielectric that consists of pure SiO 2 or a composite SiO 2/Al 2 O …

In this article, structure optimization of high-k interfacial layer (IL), deposited between the
gate and the gate sidewall spacer, was performed in a 5-nm node nanosheet field-effect …

Electromagnetic (EM) radiation-based hardware assurance methods are gaining
prominence due to their non-invasive nature of monitoring the chip activity and the potential …

With CMOS technology downscaling into the nanometer regime, the reliability of SRAM
memories is threatened by accelerated transistor aging mechanisms such as Bias …

Transistor aging mostly due to Negative and Positive Bias Temperature Instability (NBTI and
PBTI) is a major reliability threat for VLSI circuits fabricated in nanometer technology nodes …

Transistor aging due to Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI) is
one of the major reliability issues of VLSI circuits fabricated at nanometer technology nodes …

Transistor aging is a major reliability concern for nanoscale CMOS technology that can
significantly reduce the operation lifetime of very large-scale integration chips. Negative bias …

Embedded digital devices are progressively deployed in dependable or safety-critical
systems. These devices undergo significant hardware ageing, particularly in harsh …

Transistor aging, mostly due to bias temperature instability (BTI), is one of the major
unreliability sources at nano‐scale technology nodes. BTI causes the circuit delay to …