Future directions of dynamically reprogrammable systems
M Butts - Proceedings of the IEEE 1995 Custom Integrated …, 1995 - ieeexplore.ieee.org
FPGAs have made it possible to build dynamically reprogrammable systems. This paper
reviews the current state of FPGA technology, and discusses the two main classes of …
reviews the current state of FPGA technology, and discusses the two main classes of …
Modern development methods and tools for embedded reconfigurable systems: A survey
Heterogeneous reconfigurable systems provide drastically higher performance and lower
power consumption than traditional CPU-centric systems. Moreover, they do it at much lower …
power consumption than traditional CPU-centric systems. Moreover, they do it at much lower …
[图书][B] Reconfigurable computing: the theory and practice of FPGA-based computation
Reconfigurable Computing marks a revolutionary and hot topic that bridges the gap
between the separate worlds of hardware and software design—the key feature of …
between the separate worlds of hardware and software design—the key feature of …
Reconfigurable architectures for general-purpose computing
A DeHon - 1996 - dspace.mit.edu
General-purpose computing devices allow us to (1) customize computation after fabrication
and (2) conserve area by reusing expensive active circuitry for different functions in time. We …
and (2) conserve area by reusing expensive active circuitry for different functions in time. We …
OneChip: An FPGA processor with reconfigurable logic
Wittig, Chow - 1996 Proceedings IEEE Symposium on FPGAs …, 1996 - ieeexplore.ieee.org
This paper describes a processor architecture called OneChip, which combines a fixed-logic
processor core with reconfigurable logic resources. Using the programmable components of …
processor core with reconfigurable logic resources. Using the programmable components of …
A dynamic instruction set computer
MJ Wirthlin, BL Hutchings - Proceedings IEEE Symposium on …, 1995 - ieeexplore.ieee.org
A dynamic instruction set computer (DISC) has been developed that supports demand-
driven modification of its instruction set. Implemented with partially reconfigurable FPGAs …
driven modification of its instruction set. Implemented with partially reconfigurable FPGAs …
Atlanta world: An expectation maximization framework for simultaneous low-level edge grouping and camera calibration in complex man-made environments
G Schindler, F Dellaert - … of the 2004 IEEE Computer Society …, 2004 - ieeexplore.ieee.org
Edges in man-made environments, grouped according to vanishing point directions, provide
single-view constraints that have been exploited before as a precursor to both scene …
single-view constraints that have been exploited before as a precursor to both scene …
HGA: A hardware-based genetic algorithm
A genetic algorithm (GA) is a robust problem-solving method based on natural selection.
Hardware's speed advantage and its ability to parallelize offer great rewards to genetic …
Hardware's speed advantage and its ability to parallelize offer great rewards to genetic …
System and method for dynamically reconfigurable computing using a processing unit having changeable internal hardware organization
MA Baxter - US Patent 5,794,062, 1998 - Google Patents
A set of S-machines, a T-machine corresponding to each S-machine, a General Purpose
Interconnect Matrix (GPIM), a set of I/O T-machines, a set of I/O devices, and a master time …
Interconnect Matrix (GPIM), a set of I/O T-machines, a set of I/O devices, and a master time …
Method for compiling and executing programs for reprogrammable instruction set accelerator
SM Trimberger - US Patent 5,752,035, 1998 - Google Patents
A microprocessor comprises a defined execution unit coupled to internal buses of the
processor for execution of a predefined, fixed set of instructions, combined with one or more …
processor for execution of a predefined, fixed set of instructions, combined with one or more …