Neuron smearing for accelerated deep learning

S Lie, M Morrison, S Arekapudi, ME James… - US Patent …, 2022 - Google Patents
Techniques in advanced deep learning provide improvements in one or more of accuracy,
performance, and energy efficiency. An array of processing elements performs flow-based …

Microthreading for accelerated deep learning

S Lie, M Morrison, ME James, GR Lauterbach… - US Patent …, 2022 - Google Patents
Techniques in advanced deep learning provide improvements in one or more of accuracy,
performance, and energy efficiency. An array of compute elements and routers performs flow …

Novel metric for load balance and congestion reducing in network on-chip

A Aroui, P Boulet, K Benhaoua, AK Singh - … Computing: Practice and …, 2020 - scpe.org
Abstract The Network-on-Chip (NoC) is an alternative pattern that is considered as an
emerging technology for distributed embedded systems. The traditional use of multi-cores in …

Comparison of Latency Minimisation Techniques and Performance Evaluation for Application Mapping in RTNoC (Real Time Network on Chip)

S Ashtekar, K Tuckley - Advances in Computational Intelligence …, 2024 - books.google.com
In the last decade, to accomplish the High performance in Real time Embedded
applications, the dependency on Multi core processor systems has been increased. A …

Equilibrage de charge dans les MPSoCs basés NoC

A Abdelkader - 2021 - dspace.univ-oran1.dz
Résumé Le réseau sur puce (Network on Chip: NoC) est un modèle alternatif, au SoC et
MPSoC, considéré comme une technologie émergente pour les systèmes embarqués …

Accelerated deep learning

S Lie, M Morrison, ME James, GR Lauterbach… - US Patent …, 2024 - Google Patents
Techniques in advanced deep learning provide improvements in one or more of accuracy,
performance, and energy efficiency, such as accuracy of learning, accuracy of prediction …

[引用][C] DÉPARTEMENT D'INFORMATIQUE

MA MEGHABBER - 2020 - Université de Lille