Spin-transfer torque RAM (STT-RAM) has been proposed to build on-chip caches because
of its attractive features such as high storage density and ultra low leakage power. However …

Nonvolatile static random access memory (nvSRAM) has been widely investigated as a
promising on-chip memory architecture in energy harvesting sensor nodes, due to zero …

As power failures often occur in energy harvesting powered nonvolatile processors (NVPs),
checkpointing is needed during program execution. It is observed that checkpointing is …

The increasing density of NAND flash memory leads to a dramatic increase in the bit error
rate of flash, which greatly reduces the ability of error correcting codes (ECC) to handle …

As the speed gap of the modern processor and the off-chip main memory enlarges, on-chip
cache capacity increases to sustain the performance scaling. As a result, the cache power …

Non-volatile (NV) cache is desired for overcoming the power and speed bottlenecks of the
modern static random access memory (SRAM). A promising candidate for constructing the …

Spin‐transfer torque random access memory (STT‐RAM) has emerged as an eminent
choice for the larger on‐chip caches due to high density, low static power consumption and …

Existing hybrid cache architecture (HCA) studies have concentrated on managing write-
intensive blocks to relieve the write pressure on Non-volatile memory (NVM). However, they …

The new emerging non-volatile memory technology of Spin Torque Transfer RAM (STT-
RAM) has been proposed as a replacement for SRAM based cache. Recently its commercial …

Since the energy source is unstable in energy harvesting powered systems, checkpointing is
a must for the energy harvesting powered systems. Non-volatile memory is used for keeping …