[图书][B] Microarchitecture of Network-on-chip Routers

Modern computing devices, ranging from smartphones and tablets up to powerful servers,
rely on complex silicon chips that integrate inside them hundreds or thousands of …

Slim noc: A low-diameter on-chip network topology for high energy efficiency and scalability

M Besta, SM Hassan, S Yalamanchili… - ACM SIGPLAN …, 2018 - dl.acm.org
Emerging chips with hundreds and thousands of cores require networks with unprecedented
energy/area efficiency and scalability. To address this, we propose Slim NoC (SN): a new on …

Achieving high-performance on-chip networks with shared-buffer routers

AT Tran, BM Baas - IEEE Transactions on Very Large Scale …, 2013 - ieeexplore.ieee.org
On-chip routers typically have buffers dedicated to their input or output ports for temporarily
storing packets in case contention occurs on output physical channels. Buffers …

Pitstop: Enabling a virtual network free network-on-chip

H Farrokhbakht, H Kao, K Hasan… - … Symposium on High …, 2021 - ieeexplore.ieee.org
Maintaining correctness is of paramount importance in the design of a computer system.
Within a multiprocessor interconnection network, correctness is guaranteed by having …

The fast evolving landscape of on-chip communication: Selected future challenges and research avenues

D Bertozzi, G Dimitrakopoulos, J Flich… - Design Automation for …, 2015 - Springer
As multi-core systems transition to the many-core realm, the pressure on the interconnection
network is substantially elevated. The Network-on-Chip (NoC) is expected to undertake the …

[PDF][PDF] NoCTweak: a highly parameterizable simulator for early exploration of performance and energy of networks on-chip

AT Tran, B Baas - … , University of California, Davis, Tech. Rep …, 2012 - vcl.ece.ucdavis.edu
As the number of processing elements (PE) on a single chip increases with each generation
of CMOS technology, network on-chip (NoC) has become a de-facto communication fabric …

Centralized buffer router: A low latency, low power router for high radix nocs

SM Hassan, S Yalamanchili - 2013 Seventh IEEE/ACM …, 2013 - ieeexplore.ieee.org
While router buffers have been used as performance multipliers, they are also major
consumers of area and power in on-chip networks. In this paper, we propose centralized …

ElastiStore: Flexible elastic buffering for virtual-channel-based networks on chip

I Seitanidis, A Psarras, K Chrysanthou… - … Transactions on Very …, 2015 - ieeexplore.ieee.org
As multicore systems transition to the many-core realm, the pressure on the interconnection
network is substantially elevated. The network on chip (NoC) is expected to undertake the …

UBERNoC: Unified buffer power-efficient router for network-on-chip

H Farrokhbakht, H Kao, NE Jerger - Proceedings of the 13th IEEE/ACM …, 2019 - dl.acm.org
Networks-on-Chip (NoCs) address many shortcomings of traditional interconnects.
However, they consume a considerable portion of a chip's total power-particularly when the …

Butterfly pitch-angle distributions observed by ISEE-1

TA Fritz, M Alothman, J Bhattacharjya… - Planetary and Space …, 2003 - Elsevier
The ISEE-1 satellite has observed butterfly pitch-angle distributions (PAD) in protons and
electrons from 20 keV to 2 MeV in the low latitude outer magnetosphere, which showed a …