Device structure for a 3-dimensional NOR memory array and methods for improved erase operations applied thereto

E Harari, RA Cernea, G Samachisa… - US Patent …, 2021 - Google Patents
(57) ABSTRACT A thin-film storage transistor includes (a) first and second polysilicon layers
of a first conductivity serving, respec tively, as a source terminal and a drain terminal of the …

Implementing logic function and generating analog signals using NOR memory strings

S Salahuddin, RD Normal, E Harari - US Patent 11,120,884, 2021 - Google Patents
NOR memory strings may be used for implementations of logic functions involving many
Boolean variables, or to generate analog signals whose magnitudes are each …

High capacity memory circuit with low effective latency

YC Kim, RS Chernicoff, KN Quader… - US Patent …, 2023 - Google Patents
(57) ABSTRACT A first circuit formed on a first semiconductor substrate is wafer-bonded to a
second circuit formed on a second memory circuit, wherein the first circuit includes …

Channel controller for shared memory access

RD Norman, RS Chernicoff, E Harari - US Patent 11,561,911, 2023 - Google Patents
(57) ABSTRACT A shared memory provides multi-channel access from multiple computing
or host devices. A priority circuit prioritizes the multiple memory requests that are submitted …

Memory module implementing memory centric architecture

RD Norman - US Patent 11,507,301, 2022 - Google Patents
A semiconductor memory module for shared memory access implements memory-centric
structures using a quasi-volatile memory. In one embodiment, the memory module for …

3-dimensional NOR strings with segmented shared source regions

E Harari, RA Cernea - US Patent 11,335,693, 2022 - Google Patents
A NOR string includes a number of individually addressable thin-film storage transistors
sharing a bit line, with the individually addressable thin-film transistors further grouped into a …

Memory circuit, system and method for rapid retrieval of data sets

E Harari - US Patent 12,002,523, 2024 - Google Patents
A 3-dimensional array of NOR memory strings being organized by planes of NOR memory
strings, in which (i) the storage transistors in the NOR memory strings situated in a first group …

Implementing logic function and generating analog signals using NOR memory strings

S Salahuddin, RD Norman, E Harari - US Patent 11,488,676, 2022 - Google Patents
NOR memory strings may be used for implementations of logic functions involving many
Boolean variables, or to generate analog signals whose magnitudes are each …

Three-dimensional vertical nor flash thin-film transistor strings

E Harari - US Patent 11,749,344, 2023 - Google Patents
G11C16/0466—Erasable programmable read-only memories electrically programmable
using variable threshold transistors, eg FAMOS comprising cells with charge storage in an …

Process for preparing a channel region of a thin-film transistor in a 3-dimensional thin-film transistor array

V Purayath, J Zhou, WYH Chien, E Harari - US Patent 11,515,309, 2022 - Google Patents
(57) ABSTRACT A process includes (a) providing a semiconductor substrate having a
planar surface;(b) forming a plurality of thin-film layers above the planar surface of the …