FPGA HLS today: successes, challenges, and opportunities

J Cong, J Lau, G Liu, S Neuendorffer, P Pan… - ACM Transactions on …, 2022 - dl.acm.org
The year 2011 marked an important transition for FPGA high-level synthesis (HLS), as it
went from prototyping to deployment. A decade later, in this article, we assess the progress …

[HTML][HTML] Computer vision algorithms and hardware implementations: A survey

X Feng, Y Jiang, X Yang, M Du, X Li - Integration, 2019 - Elsevier
The field of computer vision is experiencing a great-leap-forward development today. This
paper aims at providing a comprehensive survey of the recent progress on computer vision …

A survey on deep learning in medicine: Why, how and when?

F Piccialli, V Di Somma, F Giampaolo, S Cuomo… - Information …, 2021 - Elsevier
New technologies are transforming medicine, and this revolution starts with data. Health
data, clinical images, genome sequences, data on prescribed therapies and results …

FPGA-based accelerators of deep learning networks for learning and classification: A review

A Shawahna, SM Sait, A El-Maleh - ieee Access, 2018 - ieeexplore.ieee.org
Due to recent advances in digital technologies, and availability of credible data, an area of
artificial intelligence, deep learning, has emerged and has demonstrated its ability and …

A configurable cloud-scale DNN processor for real-time AI

J Fowers, K Ovtcharov, M Papamichael… - 2018 ACM/IEEE 45th …, 2018 - ieeexplore.ieee.org
Interactive AI-powered services require low-latency evaluation of deep neural network
(DNN) models-aka"" real-time AI"". The growing demand for computationally expensive …

A survey of neuromorphic computing and neural networks in hardware

CD Schuman, TE Potok, RM Patton, JD Birdwell… - arXiv preprint arXiv …, 2017 - arxiv.org
Neuromorphic computing has come to refer to a variety of brain-inspired computers, devices,
and models that contrast the pervasive von Neumann computer architecture. This …

Bit fusion: Bit-level dynamically composable architecture for accelerating deep neural network

H Sharma, J Park, N Suda, L Lai… - 2018 ACM/IEEE 45th …, 2018 - ieeexplore.ieee.org
Hardware acceleration of Deep Neural Networks (DNNs) aims to tame their enormous
compute intensity. Fully realizing the potential of acceleration in this domain requires …

Finn: A framework for fast, scalable binarized neural network inference

Y Umuroglu, NJ Fraser, G Gambardella… - Proceedings of the …, 2017 - dl.acm.org
Research has shown that convolutional neural networks contain significant redundancy, and
high classification accuracy can be obtained even when weights and activations are …

A survey of FPGA-based accelerators for convolutional neural networks

S Mittal - Neural computing and applications, 2020 - Springer
Deep convolutional neural networks (CNNs) have recently shown very high accuracy in a
wide range of cognitive tasks, and due to this, they have received significant interest from the …

DNNBuilder: An automated tool for building high-performance DNN hardware accelerators for FPGAs

X Zhang, J Wang, C Zhu, Y Lin, J Xiong… - 2018 IEEE/ACM …, 2018 - ieeexplore.ieee.org
Building a high-performance FPGA accelerator for Deep Neural Networks (DNNs) often
requires RTL programming, hardware verification, and precise resource allocation, all of …