Research progress on memristor: From synapses to computing systems

X Yang, B Taylor, A Wu, Y Chen… - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
As the limits of transistor technology are approached, feature size in integrated circuit
transistors has been reduced very near to the minimum physically-realizable channel length …

An overview of processing-in-memory circuits for artificial intelligence and machine learning

D Kim, C Yu, S Xie, Y Chen, JY Kim… - IEEE Journal on …, 2022 - ieeexplore.ieee.org
Artificial intelligence (AI) and machine learning (ML) are revolutionizing many fields of study,
such as visual recognition, natural language processing, autonomous vehicles, and …

A 40-nm MLC-RRAM compute-in-memory macro with sparsity control, on-chip write-verify, and temperature-independent ADC references

W Li, X Sun, S Huang, H Jiang… - IEEE Journal of Solid …, 2022 - ieeexplore.ieee.org
Resistive random access memory (RRAM)-based compute-in-memory (CIM) has shown
great potential for accelerating deep neural network (DNN) inference. However, device …

VSDCA: A voltage sensing differential column architecture based on 1T2R RRAM array for computing-in-memory accelerators

Z Jing, B Yan, Y Yang, R Huang - IEEE Transactions on …, 2022 - ieeexplore.ieee.org
Non-volatile memory (NVM) such as RRAM and PCM has become the key component in
high energy efficiency computing-in-memory (CIM) architectures. However, the computing …

Computing-in-memory neural network accelerators for safety-critical systems: Can small device variations be disastrous?

Z Yan, XS Hu, Y Shi - Proceedings of the 41st IEEE/ACM International …, 2022 - dl.acm.org
Computing-in-Memory (CiM) architectures based on emerging nonvolatile memory (NVM)
devices have demonstrated great potential for deep neural network (DNN) acceleration …

ENNA: An efficient neural network accelerator design based on ADC-free compute-in-memory subarrays

H Jiang, S Huang, W Li, S Yu - IEEE Transactions on Circuits …, 2022 - ieeexplore.ieee.org
Compute-in-memory (CIM) is an attractive solution for machine learning hardware
acceleration since it merges computation directly into memory arrays, performing parallel …

Mac-ecc: In-situ error correction and its design methodology for reliable nvm-based compute-in-memory inference engine

W Li, J Read, H Jiang, S Yu - IEEE Journal on Emerging and …, 2022 - ieeexplore.ieee.org
Compute-in-memory (CIM) employing non-volatile memories (NVMs) has been widely
investigated as an attractive candidate to accelerate the heavy multiply-and-accumulate …

A 1T2R1C ReRAM CIM accelerator with energy-efficient voltage division and capacitive coupling for CNN acceleration in AI edge applications

D Chen, Z Guo, J Fang, C Zhao, J Jiang… - … on Circuits and …, 2022 - ieeexplore.ieee.org
Resistive random-access memory (ReRAM) is widely studied in computing-in-memory (CIM)
for neural network acceleration in edge devices. However, the static current of conventional …

A high-parallelism RRAM-based compute-in-memory macro with intrinsic impedance boosting and in-ADC computing

T Xie, S Yu, S Li - IEEE Journal on Exploratory Solid-State …, 2023 - ieeexplore.ieee.org
Resistive random access memory (RRAM) is considered to be a promising compute-in-
memory (CIM) platform; however, they tend to lose energy efficiency quickly in high …

Pim-hls: An automatic hardware generation tool for heterogeneous processing-in-memory-based neural network accelerators

Y Zhu, Z Zhu, G Dai, F Tu, H Sun… - 2023 60th ACM/IEEE …, 2023 - ieeexplore.ieee.org
Processing-in-memory (PIM) architectures have shown great abilities for neural network
(NN) acceleration on edge devices that demand low latency under severe area constraints …