Since the first release in 2015, OpenTimer v1 has been used in many industrial and
academic projects for analyzing the timing of custom designs. After four-year research and …

Common path pessimism removal (CPPR) is a key step to eliminating unwanted pessimism
during static timing analysis (STA). Unwanted pessimism will force designers and …

Common path pessimism removal (CPPR) is imperative for eliminating redundant
pessimism during static timing analysis (STA). However, turning on CPPR can significantly …

Timing optimization is repeatedly performed throughout the entire design flow. The long turn-
around time of querying a sign-off timer has become a bottleneck. To break through the …

Discrete statistical static timing analysis (SSTA) performs the timing analysis by using
statistical maximum and convolution operations. The maximum is basically a non-linear …

Due to rapidly growing design complexity, timing macro modeling has been widely adopted
to enable hierarchical and parallel timing analysis. The main challenge of timing macro …

As design complexity rapidly grows, a modem design contains more complex constraints
and has more clock domains. To these stringent timing requirements, a design is iteratively …

Path searching is a central step in static timing analysis (STA). State-of-the-art algorithms
need to generate path deviations for hundreds of thousands of paths, which becomes the …

Recently, there have been a slew of design automation contests and released benchmarks.
ISPD place & route contests, DAC placement contests, timing analysis contests at TAU and …

Due to the continuous reduction in the transistors sizing ruled by the Moore's law, digital
devices have become smaller, and more complex resulting in an enormous rise in the delay …