Customizable FPGA IP core implementation of a general-purpose genetic algorithm engine

PR Fernando, S Katkoori, D Keymeulen… - IEEE Transactions …, 2009 - ieeexplore.ieee.org
Hardware implementation of genetic algorithms (GAs) is gaining importance because of
their proven effectiveness as optimization engines for real-time applications (eg, evolvable …

Generalized disjunction decomposition for evolvable hardware

E Stomeo, T Kalganova… - IEEE Transactions on …, 2006 - ieeexplore.ieee.org
Evolvable hardware (EHW) refers to self-reconfiguration hardware design, where the
configuration is under the control of an evolutionary algorithm (EA). One of the main …

PAnDA: A reconfigurable architecture that adapts to physical substrate variations

JA Walker, MA Trefzer, SJ Bale… - IEEE Transactions on …, 2013 - ieeexplore.ieee.org
Field programmable gate arrays (FPGAs) are widely used in applications where online
reconfigurable signal processing is required. Speed and function density of FPGAs are …

FPGA-based systems for evolvable hardware

C Lambert, T Kalganova, E Stomeo - 2006 - bura.brunel.ac.uk
Since 1992, year where Hugo de Garis has published the first paper on Evolvable Hardware
(EHW), a period of intense creativity has followed. It has been actively researched …

Evolution of transistor circuits

MA Trefzer - 2006 - archiv.ub.uni-heidelberg.de
Der Entwurf von analogen Schaltungen ist ein Bereich der Elektronikentwicklung, der dem
Entwickler ein hohes Maß an Wissen und Kreativität beim Lösen von Problemen abverlangt …

[PDF][PDF] Reliable electronics through artificial evolution

M Garvie - 2005 - researchgate.net
This thesis will demonstrate the use of evolutionary algorithms applied to electronic circuit
designs (ie. Evolutionary Electronics) to improve the reliability of hardware in several ways. It …

[图书][B] Adapting Hardware Systems by Means of Multi-Objective Evolution

P Kaufmann - 2013 - books.google.com
Reconfigurable circuit devices have opened up a fundamentally new way of creating
adaptable systems. Combined with artificial evolution, reconfigurable circuits allow an …

Fighting stochastic variability in a D‐type flip‐flop with transistor‐level reconfiguration

MA Trefzer, JA Walker, SJ Bale… - IET Computers & Digital …, 2015 - Wiley Online Library
In this study, the authors present a design optimisation case study of D‐type flip‐flop timing
characteristics that are degraded as a result of intrinsic stochastic variability in a 25 nm …

模拟型演化硬件中可重构器件的比较研究

周永彬 - 2008 - chinaelectrondevices.seu.edu.cn
演化硬件的研究者受困于满足可演化要求的灵活可重构硬件平台的匮乏. 一方面,
虽然现有商用可重构平台多数具有动态可局部重构能力, 但是其设计目的不是用来研究演化硬件 …

Designing function configuration decoders for the PAnDA architecture using multi-objective cartesian genetic programming

JA Walker, MA Trefzer, AM Tyrrell - 2013 IEEE International …, 2013 - ieeexplore.ieee.org
The Programmable Analogue and Digital Array (PAnDA) is a novel reconfigurable
architecture, which allows variability aware design and rapid prototyping of digital systems …