Bio-inspired imprecise computational blocks for efficient VLSI implementation of soft-computing applications

HR Mahdiani, A Ahmadi, SM Fakhraie… - IEEE Transactions on …, 2009 - ieeexplore.ieee.org
The conventional digital hardware computational blocks with different structures are
designed to compute the precise results of the assigned calculations. The main contribution …

Design of a scalable low-power 1-bit hybrid full adder for fast computation

M Hasan, MJ Hossein, M Hossain… - … on Circuits and …, 2019 - ieeexplore.ieee.org
A novel design of a hybrid Full Adder (FA) using Pass Transistors (PTs), Transmission Gates
(TGs) and Conventional Complementary Metal Oxide Semiconductor (CCMOS) logic is …

Power-efficient approximate SAD architecture with LOA imprecise adders

R Porto, L Agostini, B Zatt, N Roma… - 2019 IEEE 10th Latin …, 2019 - ieeexplore.ieee.org
Approximate computing is a highly promising approach to reduce the computational effort in
video encoders. Its use is even more relevant and advantageous when high resolution …

Low-power split-path data-driven dynamic logic

F Frustaci, M Lanuzza, P Zicari, S Perri… - IET circuits, devices & …, 2009 - IET
Data-pre-charged dynamic logic, also known as data-driven dynamic logic (D3L), is very
efficient when low-power constraints are mandatory. Differently from conventional dynamic …

Sense amplifier half-buffer (SAHB) a low-power high-performance asynchronous logic QDI cell template

KS Chong, WG Ho, T Lin, BH Gwee… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
We propose a novel asynchronous logic (async) quasi-delay-insensitive (QDI) sense-
amplifier half-buffer (SAHB) cell design approach, with emphases on high operational …

Assessment of a universal logic gate and a full adder circuit based on cmos-memristor technology

S Guitarra, R Taco, M Gavilánez, J Yépez… - Solid-State …, 2023 - Elsevier
The study of memristor-based digital logic circuits is a new approach in non-conventional
computation frameworks because of the memristor's properties, especially the ability to store …

Energy-efficient motion estimation with approximate arithmetic

R Porto, L Agostini, B Zatt, M Porto… - 2017 IEEE 19th …, 2017 - ieeexplore.ieee.org
Energy efficiency has become a primary concern in the design of multimedia digital systems,
particularly when targeting mobile devices. Approximate computing is a highly promising …

Energy efficient self-adaptive Dual Mode Logic address decoder

K Vicuña, C Mosquera, A Musello, S Benedictis… - Electronics, 2021 - mdpi.com
This paper presents a 1024-bit self-adaptive memory address decoder based on Dual Mode
Logic (DML) design style to allow working in two modes of operation (ie, dynamic for high …

[PDF][PDF] Design and performance analysis of a 3-2 compressor by using improved architecture

I Hussain, M Kumar - Journal of Active and Passive Electronic …, 2017 - researchgate.net
In this paper, a 3-2 compressor is designed by using improved architecture and its
performance analysis in terms of power, delay and power delay product are analysed in …

Performance benchmarking of TFET and FinFET digital circuits from a synthesis-based perspective

M Rendón, C Cao, K Landázuri, E Garzón, LM Prócel… - Electronics, 2022 - mdpi.com
Miniaturization and portable devices have reshaped the electronic device landscape,
emphasizing the importance of high performance while maintaining energy efficiency to …